Arun Sharma - Cupertino CA, US Daniel Fritschen - Sunnyvale CA, US Daniel Liu - San Francisco CA, US Norma Riley - Fremont CA, US
Assignee:
Asyst Technologies, Inc. - Fremont CA
International Classification:
G08B 13/14
US Classification:
3405726, 3405721, 340 101
Abstract:
The present invention generally comprises an apparatus that allows an RFID antenna to obtain information from an RFID tag mounted on a container. The apparatus reproduces the RF field generated by the antenna to a location proximate to the RFID tag. In one embodiment, the apparatus comprises a pickup device and a reproduction device electrically coupled with the pickup device. In another embodiment, the apparatus comprises at least one magnetic rod, which creates a magnetic path for the RF field to travel between the antenna and the RFID tag. In another embodiment, the apparatus comprises a pickup antenna and a reproduction antenna for transmitting the RF signal from the antenna proximate to the RFID tag.
Tom Zhong - Saratoga CA, US Rongfu Xiao - Fremont CA, US Adam Zhong - Milpitas CA, US Wai-Ming Johnson Kan - San Ramon CA, US Daniel Liu - San Jose CA, US
Assignee:
MagIC Technologies, Inc. - Milpitas CA
International Classification:
H01L 29/82
US Classification:
257421, 257774, 257E29323, 257E23145
Abstract:
A STT-MRAM integration scheme is disclosed wherein the connection between a MTJ and CMOS metal is simplified by forming an intermediate via contact (VAC) on a CMOS landing pad, a metal (VAM) pad that contacts and covers the VAC, and a MTJ on the VAM. A dual damascene process is performed to connect BIT line metal to CMOS landing pads through VAC/VAM/MTJ stacks in a device region, and to connect BIT line connection pads to CMOS connection pads through BIT connection vias outside the device region. The VAM pad is a single layer or composite made of Ta, TaN, or other conductors which serves as a diffusion barrier, has a highly smooth surface for MTJ formation, and provides excellent selectivity with refill dielectric materials during a chemical mechanical polish process. Each VAC is from 500 to 3000 Angstroms thick to minimize additional circuit resistance and minimize etch burden.
Described herein are novel, cost effective and scalable methods for integrating a CMOS level with a memory cell level to form a field induced MRAM device. The memory portion of the device includes N parallel word lines, which may be clad, overlaid by M parallel bit lines orthogonal to the word lines and individual patterned memory cells formed on previously patterned electrodes at the N×M intersections of the two sets of lines. The memory portion is integrated with a CMOS level and the connection between levels is facilitated by the formation of interconnecting vias between the N×M electrodes and corresponding pads in the CMOS level and by word line connection pads in the memory device level and corresponding metal pads in the CMOS level. Of particular importance are process steps that replace single damascene formations by dual damascene formations, different process steps for the formation of clad and unclad word lines and the formation of patterned electrodes for the memory cells prior to the patterning of the cells themselves.
Tom Zhong - Saratoga CA, US Rongfu Xiao - Fremont CA, US Adam Zhong - Milpitas CA, US Wai-Ming Johnson Kan - San Ramon CA, US Daniel Liu - San Jose CA, US
Assignee:
MagIC Technologies, Inc. - Milpitas CA
International Classification:
H01L 21/441
US Classification:
438 3, 257421, 257E21577, 257E21579, 438637
Abstract:
A STT-MRAM integration scheme is disclosed wherein the connection between a MTJ and CMOS metal is simplified by forming an intermediate via contact (VAC) on a CMOS landing pad, a metal (VAM) pad that contacts and covers the VAC, and a MTJ on the VAM. A dual damascene process is performed to connect BIT line metal to CMOS landing pads through VAC/VAM/MTJ stacks in a device region, and to connect BIT line connection pads to CMOS connection pads through BIT connection vias outside the device region. The VAM pad is a single layer or composite made of Ta, TaN, or other conductors which serves as a diffusion barrier, has a highly smooth surface for MTJ formation, and provides excellent selectivity with refill dielectric materials during a chemical mechanical polish process. Each VAC is from 500 to 3000 Angstroms thick to minimize additional circuit resistance and minimize etch burden.
Tom Zhong - Saratoga CA, US Rongfu Xiao - Fremont CA, US Adam Zhong - Milpitas CA, US Wai-Ming Johnson Kan - San Ramon CA, US Daniel Liu - San Jose CA, US
Assignee:
MagIC Technologies, Inc. - Milpitas CA
International Classification:
H01L 29/82
US Classification:
257421, 257774, 257E29323, 257E23145
Abstract:
A STT-MRAM integration scheme is disclosed wherein the connection between a MTJ and CMOS metal is simplified by forming an intermediate via contact (VAC) on a CMOS landing pad, a metal (VAM) pad that contacts and covers the VAC, and a MTJ on the VAM. A dual damascene process is performed to connect BIT line metal to CMOS landing pads through VAC/VAM/MTJ stacks in a device region, and to connect BIT line connection pads to CMOS connection pads through BIT connection vias outside the device region. The VAM pad is a single layer or composite made of Ta, TaN, or other conductors which serves as a diffusion barrier, has a highly smooth surface for MTJ formation, and provides excellent selectivity with refill dielectric materials during a chemical mechanical polish process. Each VAC is from 500 to 3000 Angstroms thick to minimize additional circuit resistance and minimize etch burden.
CMOS devices are provided in a substrate having a topmost metal layer comprising metal landing pads and metal connecting pads. A plurality of magnetic tunnel junction (MTJ) structures are provided over the CMOS devices and connected to the metal landing pads. The MTJ structures are covered with a dielectric layer that is polished until the MTJ structures are exposed. Openings are etched in the dielectric layer to the metal connecting pads. A seed layer is deposited over the dielectric layer and on inside walls and bottom of the openings. A copper layer is plated on the seed layer until the copper layer fills the openings. The copper layer is etched back and the seed layer is removed. Thereafter, an aluminum layer is deposited over the dielectric layer, contacting both the copper layer and the MTJ structures, and patterned to form a bit line.
Blind Equalization In A Single Carrier Wideband Channel
- Santa Clara CA, US Jeffrey Baxter - Cupertino CA, US Sai Prashanth Muralidhara - Portland OR, US Sharada Venkateswaran - San Francisco CA, US Daniel Liu - Walnut Creek CA, US Nishant Singh - Bengaluru, IN Bahaa Fahim - Santa Clara CA, US Samuel D. Strom - Folsom CA, US
International Classification:
G06F 12/0817
Abstract:
A processor includes one or more cores having cache, a cache home agent (CHA), a near memory controller, to near memory, and a far memory controller, which is to: receive a first memory read operation from the CHA directed at a memory address; detect a miss for the first memory address at the near memory; issue a second memory read operation to the far memory controller to retrieve a cache line, having first data, from the memory address of far memory; receive the cache line from the far memory controller in response to the second memory read operation; and send the cache line to the CHA with a forced change to a directory state of the cache line at the CHA, the forced change to cause the CHA to snoop remote sockets to maintain data coherence for the cache line in an absence of directory state in the far memory.
Name / Title
Company / Classification
Phones & Addresses
Daniel Liu President
Jas Service Corporation Computer Maintenance/Repair
21901 Ferrero, Walnut, CA 91789
Daniel Liu President
Pro Fix Services Center Inc Services-Misc
15527 Ln Subida Dr, Whittier, CA 91745
Daniel Liu Owner
Family Health Ctr Health & Diet Foods-Retail
10041 S De Anza Blvd, Cupertino, CA 95014 4089968848
Daniel Liu President
YIYING MEDICAL, INC Health/Allied Services
6610 Camden Ave, San Jose, CA 95120 975 Redmond Ave, San Jose, CA 95120
Daniel Liu Owner
Family Health Center Ret Health Store
1564 Eddington Pl, San Jose, CA 95129 10041 S De Anza Blvd, Cupertino, CA 95014 4089968848
Daniel Liu President
COMPUPACK, INC Whol Computers/Peripherals
7101 Rainbow Dr #5, San Jose, CA 95129 4084461868
Daniel Liu President
VDL INTERNATIONAL CORP Business Services at Non-Commercial Site
USC Marshall School of Business, External Relations Department
Sep 2013 to Dec 2014 Office AssistantTeam Lead Jun 2014 to Aug 2014General Purpose Microprocessor Design
Mar 2014 to May 2014The Center for High Frequency Electronics
Sep 2012 to Sep 2013 Research AssistantMotion Sensing for Neurology
Mar 2013 to May 2013Syska Hennessy Group Culver City, CA Jun 2012 to Aug 2012 Electrical Engineer, Intern
Education:
University of Southern California Dec 2014 Master of Science in Electrical EngineeringUniversity of California Los Angeles, CA Jun 2013 Bachelor of Science in Electrical Engineering
Residential sales Luxury homes First time home buyers Co-op
Work:
Douglas Elliman New York, NY 8315242408 (Phone) License #104012462267
Client type:
Home Sellers Renters
Property type:
Condo/Townhome Residential Rental Co-op
Languages:
English Mandarin Japanese
About:
Daniel Horace Liu is fluent in English, Chinese and Japanese; plus he studied abroad in both Europe and Asia on two separate occasions. This worldly experience has given him a unique understanding of international clients of different backgrounds and cultures. Whether you are a foreign buyer or investor, or a native New Yorker seeking to rent or buy your next coop or condo in Manhattan, Daniel will provide the best customer service possible to make the process fruitful. Because he thinks outside the box, he's able to find creative solutions for clients that might not otherwise have been considered. Daniel conducts all his business with utmost integrity, patience and commitment. His goal is to establish a meeting of the minds and a win-win situation for all parties involved in a transaction. "The end goal is to have buyers like their place, and sellers like their price. Through it all, every client deserves exceptional service, and a seamless experience." Originally from Hong Kong, Daniel moved to California in 1997. He majored in Legal Studies and Global Economics at The University of California, Santa Cruz. Since he was born, his family has always been investors in real estate in Hong Kong, the most expensive market in the world per square foot. Daniel always piggybacked looking at luxurious condos with them, and fell in love with the business of properties. Daniel currently resides on Manhattan's Upper West Side. He works with clients all over the city to find the best home and value for their unique real estate needs.
ABC Network Investments 4900 Hazelnut Ave, Seal Beach, CA 90740 5625337635 (Office)
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Daniel Liu
Lived:
Pasadena, CA Norman, Ok Little Rock, AR Durham, NC Taipei, Taiwan Kaohsiung, Taiwan
Work:
University of Arkansas for Medical Sciences - Research Technician (2003-2007) University of Oklahoma - Teaching Assistant (2010-2011) California Institute of Technology - Scorekeeper (2005-2007)
Education:
California Institute of Technology - Economics, University of Oklahoma - Economics, UAMS - Medicine
Daniel Liu
Work:
#waywire - Director of Photography / Motion Graphic Designer (2012-2013) G-Unit Records - Video Intern (2011-2011) City Stage - Sound Stage Intern (2011-2011) Le Jardin Academy - Teacher's Assistant (2008-2008) New York University - Teacher's Assistant (2011-2012)
Education:
New York University - Film and Television
Relationship:
Single
Tagline:
A captivatingly creative conundrum.
Bragging Rights:
Won $200 freshmen year playing Super Smash Bros. Brawl.
Daniel Liu
Lived:
Deerfield, IL Seattle, WA
Work:
University Plastic Surgery - Plastic Surgeon (2012)
Education:
Washington University in St. Louis - Medicine, University of Washington - Plastic Surgery, Hendrix College - Chemistry
Tagline:
Dr. Liu is a plastic & reconstructive surgeon in the greater Chicago area specializing in breast reconstruction, reconstructive microsurgery, lower extremity reconstruction, craniofacial trauma, and surgery for lymphedema.
Daniel Liu
Work:
SGV International - Telecom Consultant (2012) Lockard & White - Telecom Engineer (2006-2012)
Education:
Texas A&M University - Electronics Engineering Technology
Daniel Liu
Education:
University of Wisconsin-Madison - History of Science, Reed College - History
About:
Another casualty of applied metaphysics...
Tagline:
Another casualty of applied metaphysics...
Daniel Liu
Education:
Pennsylvania State University - Finance
Daniel Liu
Education:
NTUST - RFIC
Daniel Liu
Education:
University of California, Los Angeles
Flickr
Youtube
Daniel Liu | MODEL OF THE WEEK
Daniel Liu @ FORD is our MODEL OF THE WEEK watch him recount his firs...
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1m 21s
13 year old Undergraduate Researcher at The U...
Daniel Liu is a Ottawa Hills High School student who skipped for grade...
Duration:
2m 59s
Rachmaninoff Sonata No. 2, 1st Movement by Da...
Duration:
8m 6s
Advice From 2015 You Be The Chemist Challenge...
Daniel Liu, 2015 You Be The Chemist Challenge winner, has some great a...
Duration:
1m 4s
Daniel Liu UGA Foundation Fellowship Applicat...
Duration:
59s
2018 XVI Taipei Tango Festival - Tango Emocio...
2018.9.15 Tango Emocional Ensemble with Daniel Liu perform "Esta noche...
Christopher Aagre, Jess Toal, Vincent Chiappone, Brian Baumann, Heather Brucato, Stephanie Hosier, Nicole Kruk, Ryan Lynch, Martin Grimm, Katie Neely, Tad Macdaniels