Daniel J Mclaughlin

US Patent:

52668436, Nov 30, 1993

Filed:

Mar 16, 1993

Appl. No.:

8/032740

Inventors:

Darryl Walker - Dallas TX
Daniel F. McLaughlin - Dallas TX

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

H03K 301
H03K 17687

US Classification:

3072962

Abstract:

The described embodiments of the present invention provide a substrate slew circuit that eliminates electron injection. The slew circuit comprises a semiconductor substrate, at least one transistor and a control circuit. One of a source/drain of a first transistor in the slew circuit is connected to Vss, the other of the source/drain of the first transistor is connected to the gate and one of a source/drain of a second transistor, the other of the source/drain of the second transistor is connected to the substrate. A control circuit is connected to the gate of the first transistor for controlling the passage of voltage from the one of a source/drain of the first transistor to the substrate via the gate and the one of a source/drain of the second transistor. The sensitivity of the slew circuit can be made programmable by adding one or more more n-channel transistors in stacked diode configuration between the other of the source/drain of the first transistor and the substrate.

US Patent:

56422725, Jun 24, 1997

Filed:

Oct 21, 1994

Appl. No.:

8/327334

Inventors:

Daniel F. McLaughlin - Dallas TX

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

H02M 710
G11C 700
H03K 301

US Classification:

363 49

Abstract:

The secondary power supply Vbb which powers components on a semiconductor device receives power from a distributed primary power supply Vbb. During the power-up portion for the secondary power supply Vbb, a main driver amplifier 13 provides the power. After the secondary power supply Vbb has reached the desired voltage level, a standby driver amplifier 14 is used to maintain the desired voltage level. In the present invention, the main driver amplifier 13 is activated by a time base unit 21, 22 time in response activation of the primary power supply. The time base unit 21, 22 can simultaneously inactivate the standby driver amplifier 14, or the standby power supply can operate independently of the main driver amplifier 13. After a time interval sufficient to insure that the output from the secondary power supply has reached the desired voltage level, the main driver amplifier 13 is inactivated and the standby (i. e. , lower power) amplifier provides the steady state power.

US Patent:

55089623, Apr 16, 1996

Filed:

Jun 29, 1994

Appl. No.:

8/267701

Inventors:

Daniel F. McLaughlin - Dallas TX
Darryl G. Walker - Sugar Land TX

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

G11C 1124

US Classification:

36518909

Abstract:

The plate voltage for a Dynamic Random Access Memory storage cell array is provided by two amplifiers. The first amplifier operates at a relatively low power level and compensates for leakage in the storage cell array, the compensation initiated by a departure of the plate from a nominal value which exceeds a preselected amount. The second amplifier operates at a higher power level and provides compensation for transients in the plate voltage resulting from the charging and discharging of the storage cells. Because the transients occur when the storage cells are accessed, the second amplifier is enabled only when a group of storage cells is accessed. In addition to operating at a higher power level, the second amplifier is more sensitive and responds to smaller excursions from the nominal voltage. Both the first and the second amplifiers have separate driver circuits for responding to excursions above and for responding to excursions below the nominal voltage.

US Patent:

53427998, Aug 30, 1994

Filed:

Feb 22, 1993

Appl. No.:

8/020486

Inventors:

Darryl Walker - Dallas TX
Daniel F. McLaughlin - Dallas TX

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

H01L 21335

US Classification:

437 51

Abstract:

The described embodiments of the present invention provide a substrate slew circuit that eliminates electron injection. The slew circuit comprises a semiconductor substrate, at least one transistor and a control circuit. One of source/drain of a first transistor (26) in the slew circuit is connected to Vss, the other of the source/drain of the first transistor (26) is connected to the substrate, or in another embodiment of the invention, to one of a source/drain of a second transistor (28), the gate and other of the source/drain of the second transistor (28) being connected to the substrate. A control circuit is connected to the gate of the first transistor for controlling the passage of voltage from the one of a source/drain of the first transistor (26) to the substrate via the gate and the one of a source/drain of the second transistor (28). The sensitivity of the slew circuit can be made programmable by adding p-channel transistors in stacked diode configuration between the other of the source/drain of the first transistor (26) and the substrate.

US Patent:

53131118, May 17, 1994

Filed:

Aug 11, 1993

Appl. No.:

8/105487

Inventors:

Darryl Walker - Dallas TX
Daniel F. McLaughlin - Dallas TX

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

H03K 301

US Classification:

3072962

Abstract:

The described embodiments of the present invention provide a substrate slew circuit that eliminates electron injection. The slew circuit comprises a semiconductor substrate, first and second transistors and a control circuit. One of a source/drain of the source/drain of the first transistor is connected to a reference voltage. One of a source/drain of the second transistor is connected to a gate of the first transistor, the other of the source/drain of the second transistor is coupled to receive a first voltage signal from a substrate pump. The control circuit is connected to the gate of the second transistor for controlling the passage of current from the other of the source/drain of the second transistor to the one of a source/drain of the second transistor.