Elene Chobanyan

age ~38

from Renton, WA

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Elene Chobanyan Phones & Addresses

  • Renton, WA
  • Redmond, WA
  • Fort Collins, CO

Work

  • Company:
    Colorado state university
    Aug 2010
  • Position:
    Graduate research assistant

Education

  • School / High School:
    Tbilisi State University
    Jul 2009
  • Specialities:
    M.S. in Electrical and Electronics Engineering

Skills

Antenna design • PCB design. Simulations • Algorithms • Programming • C++ • Fortran • Python • Linux • Visual Studio • MS Office • GPU • OpenMP • MPI • CUDA • software development • testing • benchmarking • software demonstration • consulting

Resumes

Elene Chobanyan Photo 1

Elene Chobanyan Fort Collins, CO

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Work:
Colorado State University

Aug 2010 to 2000
Graduate Research Assistant Colorado State University
Boulder, CO
Aug 2013 to Aug 2013
Electrical Simulation R&D Intern Electromagnetic Consulting and Software
Tbilisi
Jun 2006 to Aug 2010
R&D Engineer JSOL Corporation
Tokyo, JP
Mar 2008 to May 2008
Intern
Education:
Tbilisi State University
Jul 2009
M.S. in Electrical and Electronics Engineering Tbilisi State University
Jul 2007
B.S. in Physics Colorado State University
Fort Collins, CO
Ph.D. in Electrical and Computer Engineering
Skills:
Antenna design, PCB design. Simulations, Algorithms, Programming, C++, Fortran, Python, Linux, Visual Studio, MS Office, GPU, OpenMP, MPI, CUDA, software development, testing, benchmarking, software demonstration, consulting

Us Patents

  • Defected Ground Structure With Void Having Resistive Material Along Perimeter To Improve Emi Suppression

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  • US Patent:
    20190021164, Jan 17, 2019
  • Filed:
    Jul 14, 2017
  • Appl. No.:
    15/650223
  • Inventors:
    - Houston TX, US
    Elene Chobanyan - Ft Collins CO, US
    Benjamin Toby - Fort Collins CO, US
  • International Classification:
    H04B 3/28
    H05K 1/02
    H05K 9/00
  • Abstract:
    A multiple-layer circuit board has a signaling layer, an exterior layer, and a ground layer. A pair of differential signal lines implemented as strip lines are within the signaling layer, and propagate electromagnetic interference (EMI) along the signaling layer. An element conductively extends inwards from the exterior layer. A void of a defected ground structure within the ground layer has a size, shape, and a location in relation to the element to suppress the EMI propagated by the strip lines. A resistive material of the defected ground structure along a perimeter of the void improves suppression of the EMI propagated by the strip lines, via the resistive material absorbing the EMI.

  • Symmetry Verifications For Differential Signal Vias Of An Electronic Circuit Design

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  • US Patent:
    20180025107, Jan 25, 2018
  • Filed:
    Jul 22, 2016
  • Appl. No.:
    15/217284
  • Inventors:
    - Houston TX, US
    Elene Chobanyan - Fort Collins CO, US
  • International Classification:
    G06F 17/50
  • Abstract:
    A system may include an input engine and a symmetry verification engine. The input engine may access an electronic circuit design of an electronic design automation (EDA) tool as well as identify a particular net in the electronic circuit design. The a symmetry verification engine may identify a pair of differential signal vias in the electronic circuit design corresponding to the particular net and determine a verification area surrounding the pair of differential signal vias. The symmetry verification engine may also verify that a particular ground via within the verification area satisfies symmetry criteria with respect to the pair of differential signal vias.
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