Fred W Gross

US Patent:

7162669, Jan 9, 2007

Filed:

Jun 10, 2003

Appl. No.:

10/458474

Inventors:

Fred Gross - Fort Collins CO, US

Assignee:

Hewlett-Packard Development Company, L.P. - Houston TX

International Classification:

G11C 29/00

US Classification:

714710, 714 7, 714 25, 714723, 365201

Abstract:

An embedded memory on an integrated circuit has a memory cell array equipped with replacement cells and mapping logic for electronically substituting the replacement cells for defective cells at at least one location in the memory cell array. The memory also has programmable links for storing redundancy information in a compressed format, and decoding logic for decompressing the redundancy information and controlling the mapping logic.

US Patent:

7415580, Aug 19, 2008

Filed:

Aug 1, 2005

Appl. No.:

11/194372

Inventors:

David E. Bradley - Fort Collins CO, US
Fred J. Gross - Fort Collins CO, US

Assignee:

Hewlett-Packard Development Company, L.P. - Houston TX

International Classification:

G06F 12/00

US Classification:

711154, 711110, 711156, 710 57, 710310

Abstract:

A system for determining a position of an element in memory comprising a memory queue with a plurality of separate entries and propagate and generate logic in communication with the memory queue such that the propagate and generate logic is operable to inspect each the separate entry in the memory queue and to output one or more vectors indicating the position of the element in the memory queue.