Gang L Liu

US Patent:

6984969, Jan 10, 2006

Filed:

Mar 19, 2004

Appl. No.:

10/805459

Inventors:

Gang Liu - Sunnyvale CA, US
Joseph C. Buxton - Palo Alto CA, US

Assignee:

Analog Devices, Inc. - Norwood MA

International Classification:

G05F 1/40

US Classification:

323286, 323280, 323284, 323303

Abstract:

A voltage regulator includes a linear mode regulator having a high pass filter circuit connected between its output and an output node, and a switch mode regulator having an low pass filter circuit connected between its output and the same output node. The high pass filter passes high frequency AC current provided by the linear mode regulator to the output node and reduces the low frequency AC and DC currents to substantially zero, and the low pass filter prevents the high frequency AC current produced by the linear mode regulator from being drawn by the switch mode regulator and passes the low AC and DC currents provided by the switch mode regulator to the output node. Thus, the present regulator offers the high response speed and low noise of a linear mode regulator, and the high power efficiency and large continuous output current capability of a switch mode regulator.

US Patent:

7283345, Oct 16, 2007

Filed:

Jul 14, 2004

Appl. No.:

10/891713

Inventors:

Gang Liu - Sunnyvale CA, US

International Classification:

H02H 9/00

US Classification:

361118, 361 35

Abstract:

A printed circuit board trace coupling system for providing high voltage isolation includes a driving circuit, a coupling transformer including a printed circuit board trace, and a receiving circuit.

US Patent:

8050643, Nov 1, 2011

Filed:

May 9, 2008

Appl. No.:

12/118357

Inventors:

Songping Wu - Sunnyvale CA, US
Hua Qian - Fremont CA, US
Gang Liu - Fremont CA, US
King Chun Tsai - San Jose CA, US
Lawrence Tse - Fremont CA, US
Hui-Ling Lou - Sunnyvale CA, US

Assignee:

Marvell International Ltd. - Hamilton

International Classification:

H04B 7/00

US Classification:

4552341, 455254

Abstract:

In a method and system for controlling gain in an RF receiver, an RF signal is analyzed over different attack and decay windows, from which the receiver determines (1) if the signal is in an attack condition with dip values below a threshold level thus indicating a need for increasing signal gain, or (2) if the signal is in a decay condition with threshold values above a threshold level thus indicating a need for decreasing signal gain. The receiver applies attack and decay windows of different sizes and in an asynchronous manner to create a gain control scheme that is insensitive to transient effects such as channel interference and deep fading that affect the intensities of an in-band signal.

US Patent:

8571142, Oct 29, 2013

Filed:

Dec 1, 2011

Appl. No.:

13/309464

Inventors:

Songping Wu - Cupertino CA, US
Gang Liu - Fremont CA, US
Yonghua Song - Cupertino CA, US

Assignee:

Marvell International Ltd. - Hamilton

International Classification:

H04L 27/00
H03D 3/00
H04W 4/00
H04B 7/00
H04B 1/18
H04B 1/28
H04B 15/00

US Classification:

375326, 375324, 375322, 375316, 370330, 370329, 370328, 370310, 4551501, 455130, 4551641, 455333, 455323, 455313

Abstract:

Systems and methods for using non-crystal-based reference oscillators in the transmission and reception of frequency-modulated signals are disclosed. To protect against intrusion on neighboring designated frequency bands, guard bands, having a collective width greater than the total expected error based on the contribution of the frequency error from the non-crystal-based oscillators in the transmitter and/or receiver, can be designated. To protect against inter-channel interference within a designated frequency band, transmitters and receivers can include static sub-bandwidths wider than any possible total frequency error, such that it would be impossible for a transmitter or receiver to attempt to communicate on an unintended sub-band. The determination of the total possible frequency error can be determined dynamically based on the correlation between a received training sequence and a known pattern before or a communication session to avoid or correct for frequency offset or drift due to the use of non-crystal-based reference oscillators.

US Patent:

7362169, Apr 22, 2008

Filed:

Apr 4, 2006

Appl. No.:

11/398078

Inventors:

Gang Liu - Sunnyvale CA, US
Thomas Szepesi - Saratoga CA, US

International Classification:

H03F 1/02

US Classification:

330 51, 330 69

Abstract:

In one embodiment, an amplifier to drive a load in response to an input voltage signal, the amplifier including a first amplifier to drive the load, a second amplifier, and a control sub-circuit to put the second amplifier into an active mode to drive the load when the output voltage of the first amplifier falls outside a voltage window, and to put the second amplifier into an inactive mode when the output voltage of the first amplifier falls within the voltage window. An embodiment also includes a switch to de-couple a capacitive impedance from the load after the second amplifier is put into its active mode, and to couple the capacitive impedance to the load when the output voltage of the first amplifier falls within the voltage window. Other embodiments are described and claimed.

US Patent:

20090121273, May 14, 2009

Filed:

Sep 22, 2005

Appl. No.:

11/664018

Inventors:

Gang Liu - Fremont CA, US
Min She - Fremont CA, US

International Classification:

H01L 29/68
H01L 29/788

US Classification:

257316, 257E2917, 257E293

Abstract:

In a non-volatile semiconductor memory device including a source region separated from a drain region by a channel region and with an electrically floating gate electrode spaced from and overlying the channel region, a flexible member is spaced from the floating gate and capable of being flexed towards the floating gate for depositing or removing electrical charge on the floating gate in response to a voltage potential between the flexible member and the channel region. In one embodiment, the flexible member comprises a contact gate electrode. In another embodiment, only a single gate electrode is employed without a separate floating gate.

US Patent:

20110128536, Jun 2, 2011

Filed:

Dec 1, 2010

Appl. No.:

12/957883

Inventors:

Tiziana C. BOND - Livermore CA, US
Robin Miles - Danville CA, US
James C. Davidson - Livermore CA, US
Gang Logan Liu - Champaign IL, US

International Classification:

G01J 3/44
B05D 5/06
G03F 7/20
B82Y 20/00

US Classification:

356301, 427157, 430324, 977755, 977949

Abstract:

Methods for fabricating nanoscale array structures suitable for surface enhanced Raman scattering, structures thus obtained, and methods to characterize the nanoscale array structures suitable for surface enhanced Raman scattering. Nanoscale array structures may comprise nanotrees, nanorecesses and tapered nanopillars.

US Patent:

20140061188, Mar 6, 2014

Filed:

Aug 28, 2012

Appl. No.:

13/597195

Inventors:

Gang Liu - Santa Clara CA, US
Tong Wang - Anshan, CN

International Classification:

H05B 33/02
H05K 13/00
H05B 6/64

US Classification:

219679, 313110, 295921

Abstract:

This invention relates to a microwave oven lighting assembly. The lighting assembly has a LED lamp and one or more light-guiding members to collect and to condense the light of the lamp; the lighting assembly is placed outside of the microwave oven cavity, casting the light into the cavity through holes on the cavity wall. The invention requires significantly less energy consumption and provides greatly enhanced oven cavity illumination.