Itisha T Tyagi

age ~45

from Austin, TX

Also known as:
  • Itisha T Yagi
  • Vinit Singh
  • Tyagi Itisha
Phone and address:
10304 Kirby Cv, Austin, TX 78759

Itisha Tyagi Phones & Addresses

  • 10304 Kirby Cv, Austin, TX 78759
  • Raleigh, NC
  • Greensboro, NC

Resumes

Itisha Tyagi Photo 1

Product Marketing Manager

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Location:
Austin, TX
Industry:
Semiconductors
Work:
Cirrus Logic since Jul 2006
IC Design Engineer

Analog devices Aug 2004 - Aug 2005
Analog IC Intern

ST Microelectronics Jul 2002 - Jul 2003
Associate Design Engineer
Education:
Indian Institute of Technology, Roorkee
Bachelor of Technology (B.Tech.), Electrical, Electronics and Communications Engineering
North Carolina State University
Master of Science (M.S.), Integrated Circuit Design
Skills:
Design
Computer Hardware
Analog
Ic
Itisha Tyagi Photo 2

Analog Ic Design Engineer At Cirrus Logic

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Position:
IC Design Engineer at Cirrus Logic
Location:
Austin, Texas Area
Industry:
Computer Hardware
Work:
Cirrus Logic since Jul 2006
IC Design Engineer

Analog devices Aug 2004 - Aug 2005
Analog IC Intern

ST Microelectronics Jul 2002 - Jul 2003
Associate Design Engineer
Education:
Indian Institute of Technology, Roorkee
Bachelor of Technology (B.Tech.), Electrical, Electronics and Communications Engineering
North Carolina State University
Master of Science (M.S.), Integrated Circuit Design

Us Patents

  • Fabrication Of Piezoelectric Transducer Including Integrated Temperature Sensor

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  • US Patent:
    20190268696, Aug 29, 2019
  • Filed:
    Feb 27, 2019
  • Appl. No.:
    16/287235
  • Inventors:
    - Edinburgh, GB
    Anthony S. DOY - Los Gatos CA, US
    Itisha TYAGI - Austin TX, US
  • Assignee:
    Cirrus Logic International Semiconductor Ltd. - Edinburgh
  • International Classification:
    H04R 3/00
    H04R 17/00
    H04R 29/00
  • Abstract:
    A method of fabricating a piezoelectric transducer may include interleaving a plurality of layers of piezoelectric material with a plurality of conductive layers including a first conductive layer, one or more second conductive layers, and one or more third conductive layers, coupling the first conductive layer to a first electrode, wherein an electrical impedance of the first conductive layer varies as a function of a temperature internal to the piezoelectric transducer, and such that a measurement signal indicative of the electrical impedance is generated at the first electrode, coupling the one or more second conductive layers to a second electrode, and coupling the one or more third conductive layers to a third electrode, such that an electrical driving signal driven to the second electrode and the third electrode causes mechanical vibration of the piezoelectric transducer as a function of the electrical driving signal.
  • Controlling Parameters Of An Amplifier System Based On A Measured Physical Quantity

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  • US Patent:
    20190260333, Aug 22, 2019
  • Filed:
    Feb 11, 2019
  • Appl. No.:
    16/272215
  • Inventors:
    - Edinburgh, GB
    Itisha TYAGI - Austin TX, US
  • Assignee:
    Cirrus Logic International Semiconductor Ltd. - Edinburgh
  • International Classification:
    H03F 1/30
    H03F 13/00
    G01R 27/08
    G01R 27/26
  • Abstract:
    A method for controlling one or more parameters of an amplifier system may include receiving an indication of a physical quantity associated with the amplifier system, determining one or more parameters of the amplifier system in response to the indication, and causing the amplifier system to operate in accordance with the one or more parameters.
  • Surface Speaker

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  • US Patent:
    20190028807, Jan 24, 2019
  • Filed:
    Jul 20, 2018
  • Appl. No.:
    16/040853
  • Inventors:
    - Edinburgh, GB
    Itisha TYAGI - Austin TX, US
    John L. MELANSON - Austin TX, US
  • Assignee:
    Cirrus Logic International Semiconductor Ltd. - Edinburgh
  • International Classification:
    H04R 7/04
  • Abstract:
    Embodiments described herein provide an audio device and a method of operating the audio device. The audio device comprises at least one surface, a first surface transducer positioned to excite first modes of oscillation in a first surface of the at least one surface, and a second surface transducer positioned to excite second modes of oscillation in a second surface of the at least one surface, wherein the first modes of oscillation are of a higher frequency than the second modes of oscillation.
  • Current Sense Amplifier With Common Mode Rejection

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  • US Patent:
    20170138990, May 18, 2017
  • Filed:
    Mar 14, 2016
  • Appl. No.:
    15/069518
  • Inventors:
    - Edinburgh, GB
    Itisha Tyagi - Austin TX, US
  • International Classification:
    G01R 19/10
    H03F 1/02
    H04R 3/00
    H03F 3/45
  • Abstract:
    The overall performance of a current sense amplifier system may be improved by increasing the common mode rejection of the system. In particular, improved current sense amplifier systems of this disclosure may be configured to use a first ADC path to measure a current flowing through a device, a second ADC path to measure a common mode value, a memory element to store a calibration value, and a summer block to output a voltage proportional to the measured current through the device by correcting a voltage value output by the first ADC path based on the measured common mode value of the second ADC path and the stored calibration value.
  • Current Sense Amplifier With Enhanced Common Mode Input Range

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  • US Patent:
    20170141732, May 18, 2017
  • Filed:
    Mar 14, 2016
  • Appl. No.:
    15/069733
  • Inventors:
    - Edinburgh, GB
    Itisha Tyagi - Austin TX, US
  • International Classification:
    H03F 1/02
    H03F 3/45
  • Abstract:
    The overall performance of a current sense amplifier system may be improved by increasing the common mode rejection of the system. In particular, improved current sense amplifiers may be configured to use a first signal path coupled to the amplifier and a first input terminal, wherein the first signal path is configured to measure the current through a device by generating a voltage proportional to the measured current, wherein the generated voltage comprises a small signal voltage with a large common mode voltage, and a second signal path coupled to the amplifier and the first input terminal, wherein the second signal path is configured to reduce the common mode of the generated voltage by level shifting the generated voltage to reduce the common mode voltage.

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Itisha Tyagi Photo 3

Itisha Tyagi


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