Jason D Park

US Patent:

20230035174, Feb 2, 2023

Filed:

Jul 30, 2021

Appl. No.:

17/390790

Inventors:

- San Jose CA, US
Luigi Celano - San Jose CA, US
Garun Arustamov - San Jose CA, US
Jason Park - San Jose CA, US
Derek Wong - San Jose CA, US

International Classification:

H02S 30/20
H01L 31/046
H02S 40/22
H02S 10/40
B64G 1/44

Abstract:

A system for harvesting solar energy on a spacecraft includes a stiff substrate layer and a working layer disposed on the substrate layer to provide at least one of a photovoltaic or a reflective function. In a first operational state, the substrate layer is arranged as a tape spring to store potential energy which causes the substrate layer to uncoil and provide, in a second operational state, a photovoltaic module and/or a solar concentrator.

US Patent:

20160329213, Nov 10, 2016

Filed:

Apr 11, 2016

Appl. No.:

15/095258

Inventors:

- Fremont CA, US
Jason Daejin Park - San Jose CA, US
Patrick A. Van Cleemput - San Jose CA, US
Yezdi Dordi - Palo Alto CA, US

International Classification:

H01L 21/285
H01L 21/3213
H01L 21/768

Abstract:

A method for providing a metal diffusion barrier layer comprising providing a substrate including a metal layer; depositing a dielectric layer on the metal layer; defining a feature in the dielectric layer, wherein the feature includes side walls defined by the dielectric layer and a bottom surface defined by the metal layer; selectively depositing a metal diffusion barrier layer on the side walls of the feature and not depositing the metal diffusion barrier layer on the bottom surface of the feature, wherein the metal diffusion barrier layer includes amorphous carbon; and depositing metal in the feature.

US Patent:

20160314964, Oct 27, 2016

Filed:

Apr 21, 2015

Appl. No.:

14/692627

Inventors:

- Fremont CA, US
Jason Daejin Park - San Jose CA, US
Bart J. van Schravendijk - Palo Alto CA, US
Shu Tsai Wang - Dublin CA, US
Kaihan Abidi Ashtiani - Cupertino CA, US

International Classification:

H01L 21/02
H01L 21/768
H01L 21/762
H01L 21/311

Abstract:

Provided herein are methods of filling gaps using high density plasma chemical vapor deposition (HDP CVD). According to various implementations, carbon-containing films such as amorphous carbon and amorphous carbide films are deposited by HDP CVD into gaps on substrates to fill the gaps. The methods may involve using high hydrogen-content process gasses during HDP CVD deposition to provide bottom-up fill. Also provided are related apparatus.

US Patent:

20160300713, Oct 13, 2016

Filed:

Apr 9, 2015

Appl. No.:

14/683022

Inventors:

- Fremont CA, US
Jason Daejin Park - San Jose CA, US

International Classification:

H01L 21/02
C23C 16/52
C23C 16/455
C23C 16/50

Abstract:

Methods and apparatuses for conditioning chambers using a two-stage process involving a low bias and a high bias stage are provided. Methods also involve clamping a protective electrostatic chuck cover to a pedestal by applying a bias to the electrostatic chuck during the high bias stage while cooling the protective electrostatic chuck cover, such as by flowing helium to the backside of the cover.

US Patent:

20140134827, May 15, 2014

Filed:

Nov 7, 2013

Appl. No.:

14/074596

Inventors:

- Fremont CA, US
Bart van Schravendijk - Cupertino CA, US
Adrien Lavoie - Newberg OR, US
Sesha Varadarajan - Lake Oswego OR, US
Jason Daejin Park - San Jose CA, US
Michal Danek - Cupertino CA, US
Naohiro Shoda - Los Gatos CA, US

Assignee:

Novellus Systems, Inc. - Fremont CA

International Classification:

H01L 21/762
H01L 21/67

US Classification:

438437, 15634524

Abstract:

A method and apparatus for conformally depositing a dielectric oxide in high aspect ratio gaps in a substrate is disclosed. A substrate is provided with one or more gaps into a reaction chamber where each gap has a depth to width aspect ratio of greater than about 5:1. A first dielectric oxide layer is deposited in the one or more gaps by CFD. A portion of the first dielectric oxide layer is etched using a plasma etch, where etching the portion of the first dielectric oxide layer occurs at a faster rate near a top surface than near a bottom surface of each gap so that the first dielectric oxide layer has a tapered profile from the top surface to the bottom surface of each gap. A second dielectric oxide layer is deposited in the one or more gaps over the first dielectric oxide layer via CFD.