John R Mcmillan

US Patent:

8338924, Dec 25, 2012

Filed:

Oct 6, 2011

Appl. No.:

13/253995

Inventors:

John Robert McMillan - Fontana CA, US
Xiao Yun Chen - Shenzhen, CN
Tung Lok Li - Hong Kong, CN

Assignee:

QPL Limited - Hksar

International Classification:

H01L 23/495

US Classification:

257666, 257676, 257782, 438123, 438118

Abstract:

A substrate for integrated circuit package is disclosed. The substrate comprises an electrically conductive leadframe having a first side and an opposing second side. The substrate has a first bonding compound disposed in a first recessed portion of the first side and a second bonding compound disposed in at least a portion of a second recessed portion of the leadframe, selectively exposing a selected area of the leadframe on the second side. In an exemplary embodiment, the second bonding compound is a photolithographic material. A method of manufacturing a substrate for integrated circuit package is also disclosed.

US Patent:

8486762, Jul 16, 2013

Filed:

Mar 8, 2010

Appl. No.:

13/254905

Inventors:

John McMillan - Seaview WA, US
Kirk Powell - Greeley CO, US
Adonis Fung - Hong Kong, CN

Assignee:

UTAC Hong Kong Limited - Tsuen Wan, New Territories

International Classification:

H01L 21/00

US Classification:

438111, 257E33066

Abstract:

A leadless integrated circuit (IC) package comprising an IC chip mounted to a die-attach area and a plurality of electrical contacts electrically connected to the IC chip. The IC chip, the electrical contacts, and the die-attach area are all covered with a molding material, with portions of the electrical contacts and die-attach area protruding from a bottom surface of the molding material.

US Patent:

8513786, Aug 20, 2013

Filed:

May 20, 2011

Appl. No.:

13/111981

Inventors:

John Robert McMillan - Fontana CA, US
Xiao Yun Chen - Shenzhen, CN
Tung Lok Li - Hong Kong, CN

Assignee:

QPL Limited - Hong Kong

International Classification:

H01L 23/495

US Classification:

257670, 257676

Abstract:

A substrate and a method of making thereof are disclosed. The substrate comprises an electrically conductive leadframe, the leadframe having a plurality of lands on a first side of the leadframe with a first recessed portion between the lands, and a plurality of routing leads on an opposing second side of the leadframe with a second recessed portion between the routing leads. The substrate also comprises a first bonding compound filling the first recessed portion. In one embodiment, the substrate also comprises a support material attached to the first bonding compound for holding the leadframe together. In another embodiment, the substrate comprises a second bonding compound filling the second recessed portion.

US Patent:

8569110, Oct 29, 2013

Filed:

May 20, 2011

Appl. No.:

13/111982

Inventors:

John Robert McMillan - Fontana CA, US
Xiao Yun Chen - Shenzhen, CN
Tung Lok Li - Hong Kong, CN

Assignee:

QPL Limited - Hong Kong

International Classification:

H01L 21/00

US Classification:

438123, 438124, 257E21506

Abstract:

A substrate and a method of making thereof are disclosed. The substrate comprises an electrically conductive leadframe, the leadframe having a plurality of lands on a first side of the leadframe with a first recessed portion between the lands, and a plurality of routing leads on an opposing second side of the leadframe with a second recessed portion between the routing leads. The substrate also comprises a first bonding compound filling the first recessed portion. In one embodiment, the substrate also comprises a support material attached to the first bonding compound for holding the leadframe together. In another embodiment, the substrate comprises a second bonding compound filling the second recessed portion.

US Patent:

20140367865, Dec 18, 2014

Filed:

May 27, 2014

Appl. No.:

14/287603

Inventors:

- Tsuen Wan, CN
John McMILLAN - Seaview WA, US
Adonis FUNG - Tsing Yi, HK

Assignee:

UTAC Hong Kong Limited - Tsuen Wan

International Classification:

H01L 23/00

US Classification:

257777

Abstract:

A leadless integrated circuit (IC) package comprising an IC chip mounted on a die attach pad and a plurality of electrical contacts electrically connected to the IC chip. The IC chip, the electrical contacts, and the die attach pad are all covered with a molding material, with portions of the electrical contacts and die attach pad protruding from a bottom surface of the molding material.