Julia L Liu

US Patent:

7684927, Mar 23, 2010

Filed:

Dec 23, 2005

Appl. No.:

11/318184

Inventors:

Ying Zhang - Cupertino CA, US
Qingfeng Huang - San Jose CA, US
Julia Liu - Milpitas CA, US

Assignee:

Palo Alto Research Center Incorporated - Palo Alto CA

International Classification:

G01C 21/00

US Classification:

701201, 342450, 342457

Abstract:

A system and method for performing distributed sequential node localization in active sensor deployment is presented. An equilateral orthogonal reference frame is defined. The reference frame includes s+1 anchor nodes that is placed in s-dimensional physical space. New nodes are sequentially placed in a natural sequential ordering within the s-dimensional physical space to form a sequentially well-connected network. For each of the new nodes, location estimates are obtained for the new node from at least s+1 of the anchor nodes previously placed in the s-dimensional physical space. A location is determined for the new node based on the location estimates. The new node are placed in the s-dimensional physical space as a new anchor node proximate to at least one of the s+1 previously-placed anchor nodes upon satisfactory location determination.

US Patent:

20120269291, Oct 25, 2012

Filed:

Nov 16, 2011

Appl. No.:

13/298282

Inventors:

Hua Wang - San Francisco CA, US
Chao Lu - Fremont CA, US
Julia Liu - San Jose CA, US
Chun-Hsien Peng - Nantou County, TW
Sang Won Son - Palo Alto CA, US
Paul Cheng Po Liang - Hsinchu County, TW

International Classification:

H04L 25/49

US Classification:

375297

Abstract:

A radio frequency (RF) transmitter has at least one digital signal processing module and at least one power amplifier module. The digital signal processing module includes at least one digital pre-distortion component arranged to receive at least one complex input signal, perform two-dimensional non-uniform mapping of the complex input signal to a first, in-phase, digital pre-distortion control word and a further, quadrature, digital pre-distortion control word, and output the in-phase and quadrature pre-distortion digital control words. The power amplifier module includes a first, in-phase, array of switch-mode power cells and at least one further, quadrature, array of switch-mode power cells. The two-dimensional non-uniform mapping has a pre-distortion profile at least partly based on an input/output relationship for the power amplifier module arranged to generate an analogue RF signal based at least partly on the in-phase and quadrature digital pre-distortion control words.

US Patent:

20120269293, Oct 25, 2012

Filed:

Apr 20, 2012

Appl. No.:

13/451570

Inventors:

Chun-Hsien Peng - Nantou County, TW
Julia Liu - San Jose CA, US
Chao Lu - Fremont CA, US
Hua Wang - San Francisco CA, US
Paul Cheng Po Liang - Hsinchu County, TW

International Classification:

H04L 25/49

US Classification:

375297

Abstract:

A radio frequency (RF) transmitter architecture includes at least one digital signal processing module. The at least one digital signal processing module is configurable to operate in at least a first mode wherein the at least one digital signal processing module is arranged to receive a digital input signal, select, from a reduced set of digital power amplifier (DPA) control values, a plurality of DPA control values based at least partly on the received digital input signal, perform interpolation of the plurality of selected DPA control values to determine a DPA control value from a non-reduced set of DPA control values representative of the received digital input signal, and output to at least one DPA component the determined DPA control value representative of the received digital input signal.

US Patent:

59681829, Oct 19, 1999

Filed:

May 12, 1997

Appl. No.:

8/854441

Inventors:

James C. Chen - San Jose CA
Julia Liu - Sunnyvale CA
Chan Y. Ng - San Jose CA
William G. Sherman - Tucson AZ

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 1100

US Classification:

714 5

Abstract:

A method and means within a hierarchical, demand/response DASD subsystem of the passive fault management type in which, upon the occurrence of fault, error, or erasure, a long device busy signal of finite duration is provided to a host CPU. Any DASD storage device subject to the anomaly is isolated from any host inquiry during this interval. These measures permit retry or other recovery procedures to be implemented transparent to the host and the executing application. This avoids premature declarations of faults, errors, or erasures and consequent host application aborts and other catastrophic measures. If the detected anomaly is not resolved within the allotted time, then other data recovery procedures can be invoked including device reset, the status reported to the host, and the next request processed.

US Patent:

57014299, Dec 23, 1997

Filed:

Aug 16, 1996

Appl. No.:

8/698825

Inventors:

Vernon J. Legvold - Tucson AZ
Julia Liu - Sunnyvale CA
Carol S. Michod - Tucson AZ
Chan Yiu Ng - San Jose CA
William G. Sherman - Tucson AZ
Jeffrey R. Steffan - San Jose CA
Steven R. Van Gundy - Gilroy CA

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 1202

US Classification:

395441

Abstract:

A system and method for changing the number of logical volumes in a drawer in a rack in a direct access storage device subsystem is disclosed. The method and system are able to change the number of logical volumes without disrupting access to the other logical volumes in the rack. Channel connection addresses, which are logical volume addresses as known by the CPUs, are freed by removing the old drawer and then are mused. If the new drawer has more logical volumes than the old drawer, the next unused channel connection addresses are used with the new drawer. In a subsystem having a storage controller for providing control for a plurality of direct access storage devices, the logical volumes are spread across multiple physical devices. The storage controller maintains configuration data for the entire subsystem in redundant, non-volatile storage locations reserved specifically for its use. Each logical volume address for the rack is set by the drawer location and the logical sequence of the volumes within the drawer.