Qualcomm - Greater San Diego Area since Aug 2011
Staff Engineer - Wireless Modem Devvelopment
Broadcom - Greater San Diego Area Oct 2010 - Aug 2011
Principle Firmware Engineer
Wavesat - San Francisco Bay Area Jul 2010 - Oct 2010
Consultant - Embedded firmware
Agilent Technologies - Liberty Lake, WA Jul 2009 - Jul 2010
R&D Engineer
Tyco Electronics - Greater Boston Area Apr 2005 - Jul 2009
Principle Engineer
Education:
Nantong Middle School 1982 - 1988
Nanjing University 1988 - 1992
University of Wollongong 1996 - 1998
University of Toronto 1999 - 2000
Skills:
Lte Embedded Systems Firmware Embedded Software Baseband C C++ Digital Signal Processing Asic Debugging Device Drivers Fpga Digital Signal Processors Electronics
Daniel Wayne Ericson - Hollis NH, US Jun Ni - Liberty Lake WA, US Liang Ban - Burlington MA, US Brett L. Hansmeier - Manchester NH, US Yuan Chen - Lexington MA, US
Assignee:
Harris Corporation - Melbourne FL
International Classification:
H04L 5/12
US Classification:
375262, 375259, 375260, 375295, 375316
Abstract:
A method and apparatus for communicating wirelessly comprising creating a plurality of sub-carrier signals by quadrature amplitude modulating data onto a plurality of sub-carrier frequencies spaced apart by a sub-carrier frequency spacing interval, frequency shifting the sub-carrier signals by one half of the sub-carrier frequency spacing interval, and modulating the sub-carrier signals onto a radio frequency carrier wave for wireless transmission.
Systems And Methods For Unequal Error Protection And Soft Decision Calculations
Daniel Wayne Ericson - Hollis NH, US Jun Ni - Liberty Lake WA, US Liang Ban - Burlington MA, US
Assignee:
Harris Corporation - Melbourne FL
International Classification:
H04L 27/06 H04L 27/22
US Classification:
375329, 375340, 375341
Abstract:
A wireless communications device () is provided. The device includes a demodulator () configured for computing estimated bits for a modulated input signal representing a the symbols associated with a frame, the estimated bits including estimated values for a frame of bits and at least one forward error correction (FEC) error bit encoded into the symbols. The device further includes an FEC decision decoder () configured for receiving at least a first portion of the estimated bits and calculating values for a first portion of the frame bits associated with the first portion of said the estimated bits, where the estimated bits are computed based on a condition of a communication channel associated with the modulated input signal and a frequency deviation associated with said demodulator.
Daniel Wayne Ericson - Hollis NH, US Jun Ni - Liberty Lake WA, US
Assignee:
Harris Corporation - Melbourne FL
International Classification:
H04B 7/212
US Classification:
370442
Abstract:
In accordance with a first aspect, a method, apparatus and system is disclosed for communicating within a TDMA communication system comprising receiving data from a plurality of transmitters in a stream of TDMA super-frames, wherein each transmitter transmits payload data in one particular frame within a defined super-frame, each super-frame comprising M frames, where M is a positive integer greater than one, determining, using a processor, a quality of received data from said transmitters, and if the quality of received data from one of said transmitters is below a quality threshold, granting said one of said transmitters the right to transmit data within a second frame in said super-frames, and collectively processing in a processor said data in both frames of said super-frame assigned to said one of said transmitters to reconstruct said data from said one of said transmitters Also, a method, apparatus and system for processing data received in a TDMA communication system utilizing a stream of TDMA super-frames, each super-frame having a structure comprising M frames, each frame designed to carry data of a duration of Y time units, from a different communication channel, where Y is a positive integer, said method comprising dividing said super-frame into N/M hyper-frames, where N is a factor of M, and partitioning said data from each of said transmitters into mini-frames of duration Y/N and interleaving said mini-frames of data from each of said transmitters into a TDMA transport stream comprising super-frames of M*N mini-frame
Systems And Methods For Time Division Multiple Access Communication With Automatic Repeat Request Error Control
Daniel W. Ericson - Hollis NH, US Jun Ni - Liberty Lake WA, US Albert J. Bruso - Templeton MA, US
Assignee:
HARRIS CORPORATION - Melbourne FL
International Classification:
H04L 12/26
US Classification:
370252
Abstract:
Systems () and methods for providing TDMA communication. The methods involve determining a channel quality of an uplink channel. A communication delay is set equal to an integer value “K”. “K” is selected based on the channel quality. “K”≦“N”. “N” is a total number of frames of a time slot of a TDMA signal (). Thereafter, First Message Data (FMD) is communicated over the uplink channel in a first time slot (A) of an uplink signal (). An Error Control Process (ECP) is performed using FMD to at least identify First Error Free Message Data (FEFMD). Filler data and/or at least a portion of FEFMD is communicated over a downlink channel in a last “N−K” frames of a time slot (A) of a downlink signal (), when “K”
- San Diego CA, US Vijaya Chandran RAMASAMI - San Diego CA, US Arunava CHAUDHURI - San Diego CA, US Jun NI - San Diego CA, US
International Classification:
H04W 52/02 H04W 24/08 H04W 76/04
Abstract:
Aspects provide techniques and apparatus for wireless communications (e.g., for saving power when performing control channel processing when in an idle mode or in a “PDCCH only” in connected mode). An exemplary method includes performing, using a processor, a first type of control channel processing in a first connection state using a firmware image stored in internal memory of the processor, wherein performing control channel processing comprises accessing memory external to the processor, determining one or more conditions for entering a low-power mode (LPM) associated with the processor are satisfied, entering the LPM based on the determination, wherein entering into the LPM includes at least one of disabling or disallowing access to the external memory based on entering the LPM, and performing, using the processor, a second type of control channel processing using the firmware image stored in internal memory of the processor based on entering the LPM.
Isbn (Books And Publications)
Grid and Cooperative Computing: Second International Workshop, Gcc 2003, Shanghai, China, December 7-10, 2003, Revised Papers
Advanced Web And Network Technologies, And Applications: Apweb 2006 International Workshops Xra, Iwsn, Mega, And Icse, Harbin, China, January 16-18, 2006, Proceedings