Mahendra E Singh

US Patent:

6559722, May 6, 2003

Filed:

Aug 8, 2000

Appl. No.:

09/634628

Inventors:

Osvaldo Jorge Lopez - Lebanon NJ
Robert Bayruns - Los Gatos CA
Mahendra Singh - Bridgewater NJ

Assignee:

Anadigics, Inc. - Warren NJ

International Classification:

H03F 304

US Classification:

330296, 330289

Abstract:

A power amplifier circuit is disclosed, whose power efficiency is optimized by operating its stages in substantially close to a Class B mode by reducing the quiescent current during low driver signal levels. As the driver signal amplitude increases, the amplifier is dynamically biased to operate in a Class AB mode. A further enhancement to the power amplifier circuit includes a temperature compensation circuit to adjust the bias of the amplifier so as to stabilize the performance over a wide temperature range.

US Patent:

6937102, Aug 30, 2005

Filed:

Jul 29, 2002

Appl. No.:

10/208636

Inventors:

Osvaldo Jorge Lopez - Lebanon NJ, US
Robert Bayruns - Los Gatos CA, US
Mahendra Singh - Bridgewater NJ, US

Assignee:

Anadigics, Inc. - Warren NJ

International Classification:

H03F003/04

US Classification:

330296, 330285

Abstract:

A power amplifier circuit whose performance is optimized by operating its stages in substantially close to a Class B mode by reducing quiescent current during low driver signal levels. As the driver signal amplitude increases, the operation of the amplifier is configured to dynamically adjust to be in a Class AB mode, thereby increasing the power efficiency of the overall circuit at kiw drive levels. A further enhancement to the power amplifier circuit includes a temperature compensation circuit to adjust the bias of the amplifier so as to stabilize the performance in a wide temperature range.

US Patent:

7248111, Jul 24, 2007

Filed:

Apr 14, 2005

Appl. No.:

11/106254

Inventors:

Sheldon Xu - Edison NJ, US
Thomas William Arell - Basking Ridge NJ, US
Mahendra Singh - Bridgewater NJ, US
Mohammed Ali Khatibzadeh - Hampton NJ, US

Assignee:

Anadigics, Inc - Warren NJ

International Classification:

H03G 5/16

US Classification:

330133, 330285, 330296, 330310

Abstract:

A power amplifier with a multi-mode digital bias control circuit is provided. The power amplifier utilizes a complementary reference voltage generation circuit and a bias current-control circuit to generate a plurality of bias current levels for different output power levels. In an embodiment of the present invention, the power amplifier circuit is connected to a reference voltage and two control signals. Depending on the desired output power level, the control signals set the corresponding bias current in the amplifying transistors, to ensure sufficient linearity. The power amplifier is capable of operating at a very low quiescent current level, for example, 5 mA. As a result, a significant improvement in the power amplifier's overall efficiency is achieved, and the battery talk time of a wireless communication device is increased. The invention finds application in wireless communication devices such as CDMA, WCDMA, EDGE and WLAN mobile devices.