Mark A Mclaughlin

US Patent:

6725301, Apr 20, 2004

Filed:

Jun 29, 2000

Appl. No.:

09/606640

Inventors:

Ghadir Robert Gholami - Austin TX
Mark David McLaughlin - Austin TX
John Daniel Upton - Georgetown TX

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 1314

US Classification:

710 62, 710102, 710103, 710128

Abstract:

A modified system causes the REQ64# signal to be asserted when the adapter is in reset on a 64-bit slot. This allows the adapter to see that it is in a 64-bit slot at the beginning of reset, preventing the adapter from driving the 64-bit extension pins. The above-described modification must be made to all the 64-bit slots on a system. When the reset signal is active, it will cause the buffer to drive the REQ64# signal low. This will synchronize reset and REQ64#, eliminating the possibility for bus contention. No modification is necessary for 32-bit slots. This modification will not affect the normal operation of the bus, since it is only used during reset.

US Patent:

7136778, Nov 14, 2006

Filed:

Sep 2, 2004

Appl. No.:

10/932700

Inventors:

Mike Conrad Duron - Pflugerville TX, US
Mark David McLaughlin - Austin TX, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 19/00

US Classification:

702182, 702186, 714724, 714727, 714 30, 714 47

Abstract:

A non-invasive method, system, and computer product for monitoring I/O performance without using the RIO bus. When executing a performance benchmark run in a remote I/O drawer, the system logs into a bulk power controller, wherein the bulk power controller provides a communications path between the data processing system and the I/O drawer, and wherein the communications path allows the data processing system to access chip register information on the I/O drawer without using a RIO link. Using the communications path, the system may monitor I/O performance and obtain chip register information. The system may further increase performance by using software to detect a load imbalance. Through the communications path, the software is able to dynamically balance the load by changing the chip register settings to allow the initialization registers to handle the load more efficiently.

US Patent:

7290180, Oct 30, 2007

Filed:

Sep 2, 2004

Appl. No.:

10/932704

Inventors:

Mike Conrad Duron - Pflugerville TX, US
Mark David McLaughlin - Austin TX, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 11/00

US Classification:

714 43

Abstract:

A method, system, and computer product for aiding in the debugging of an I/O failure. When an I/O failure is detected on a RIO drawer, a data processing system uses the bulk power controller to provide an alternate path, rather than using the existing RIO links, to access registers on the I/O drawers. The system logs onto the bulk power controller, which provides a communications path between the data processing system and the RIO drawer. The communications path allows the data processing system to read the chip registers on the I/O drawer. The data processing system captures I/O failure information in the I/O drawer using the communications path, wherein the I/O failure information is used to debug the I/O failure.

US Patent:

7454657, Nov 18, 2008

Filed:

Sep 2, 2004

Appl. No.:

10/932706

Inventors:

Mike Conrad Duron - Pflugerville TX, US
Mark David McLaughlin - Austin TX, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 11/00

US Classification:

714 30, 714 43, 714 44

Abstract:

A method for self-diagnosing remote I/O enclosures with enhanced FRU callouts. When a failure is detected on a RIO drawer, a data processing system uses the bulk power controller to provide an alternate path, rather than using the existing RIO links, to access registers on the I/O drawers. The system logs onto the bulk power controller, which provides a communications path between the data processing system and the RIO drawer. The communications path allows the data processing system to read all of the registers on the I/O drawer. The register information in the I/O drawer is then analyzed to diagnose the I/O failure. Based on the register information, the data processing system identifies a field replacement unit to repair the I/O failure.

US Patent:

7526639, Apr 28, 2009

Filed:

Feb 13, 2006

Appl. No.:

11/352696

Inventors:

Mike Conrad Duron - Pflugerville TX, US
Mark David McLaughlin - Austin TX, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 9/00
G06F 11/00
G06F 15/177

US Classification:

713 1, 714100, 714 10, 714 13

Abstract:

A computer implemented method and system for enhancing boot time of a computer system. Initial program load firmware is initialized on a plurality of service processors. The plurality of service processors performs independent non-redundant initialization tasks concurrently as other independent non-redundant initialization tasks are performed by another service processor. Once the initialization tasks are completed, control is switched to a primary service processor within the plurality of service processors and runtime firmware is loaded by the primary service processor.

US Patent:

7571307, Aug 4, 2009

Filed:

Jul 26, 2006

Appl. No.:

11/459946

Inventors:

Mike C. Duron - Pflugerville TX, US
Mark D. McLaughlin - Austin TX, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 9/00
G06F 15/177
G06F 1/24
G06F 3/00

US Classification:

713 1, 713 2, 713100, 710 10, 710 18

Abstract:

Mechanisms are provided for performing capacity upgrade on-demand operations for input/output(I/O) adapters of a data processing device. The mechanisms involve providing a data processing device with additional I/O adapters in excess of current I/O capacity requirements of an owner/user of the data processing device. These additional I/O adapters remain in an inactive state after booting of the data processing device until they are specifically activated by the owner/user. Although inactive, memory resources are reserved for the address translation data structures for these inactive I/O adapters. The owner/user may, at a later time, obtain an activation code from a provider of the data processing device and enter the activation code into a hardware management console to thereby activate the additional I/O adapters. The reserved memory resources are then utilized to initialize the address translation data structures for these now active I/O adapters.

US Patent:

7661006, Feb 9, 2010

Filed:

Jan 9, 2007

Appl. No.:

11/621354

Inventors:

Luai A. Abou-Emara - Austin TX, US
Mark David McLaughlin - Austin TX, US
Jorge N. Yanez - Leander TX, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 1/04
G06F 9/00
G06F 15/177
G06F 11/07

US Classification:

713375, 713 1, 713 2, 713100, 714100, 712 1, 712 2, 712 3, 712 10, 712 11, 712 15, 712 21, 712 22, 712 33

Abstract:

A computer implemented method, apparatus, and computer program product for managing symmetric multiprocessor interconnects. The process identifies functional communication connections between each processor in a plurality of processors on a multiprocessor to form identified functional communication connections. The process maps every functional communication connection between any two processors in the plurality of processors, based on the identified functional communication connections, to form an interconnect matrix. The process creates a path map using the interconnect matrix. The path map comprises a sequence of communication connections between the plurality of processors. The process initializes the plurality of processors using the path map.

US Patent:

7669084, Feb 23, 2010

Filed:

Oct 8, 2008

Appl. No.:

12/247831

Inventors:

Mike C. Duron - Pflugerville TX, US
Mark D. McLaughlin - Austin TX, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 11/00

US Classification:

714 30, 714 43, 714 44

Abstract:

A method, apparatus, and computer instructions for self-diagnosing remote I/O enclosures with enhanced FRU callouts. when a failure is detected on a RIO drawer, a data processing system uses the bulk power controller to provide an alternate path, rather than using the existing RIO links, to access registers on the I/O drawers. The system logs onto the bulk power controller, which provides a communications path between the data processing system and the RIO drawer. The communications path allows the data processing system to read all of the registers on the I/O drawer. The register information in the I/O drawer is then analyzed to diagnose the I/O failure. Based on the register information, the data processing system identifies a field replacement unit to repair the I/O failure.