Matthew C Wilson

US Patent:

20170308696, Oct 26, 2017

Filed:

Jul 6, 2017

Appl. No.:

15/643408

Inventors:

- Seattle WA, US
Nachiketh Rao Potlapally - Arlington VA, US
William John Earl - Burien WA, US
Matthew Shawn Wilson - Seattle WA, US

International Classification:

G06F 21/55
G06F 9/50
G06F 9/46
G06F 21/53
G06F 9/455

Abstract:

Techniques are described for allocating resources to a task from a shared hardware structure. A plurality of tasks may execute on a processor, wherein the processor may include one or more processing cores and each task may include a plurality of computer executable instructions. In accordance with one technique for allocating resources to a task from a shared hardware structure amongst multiple tasks, aspects of the disclosure describe assigning a first identifier to a first task from the plurality of tasks, associating a portion of the shared hardware resource with the first identifier, and restricting access and/or observability for computer executable instructions executed from any other task than the first task to the portion of the hardware resource associated with the first identifier.

US Patent:

20160092677, Mar 31, 2016

Filed:

Sep 30, 2014

Appl. No.:

14/502891

Inventors:

- Seattle WA, US
Nachiketh Rao Potlapally - Arlington VA, US
William John Earl - Burien WA, US
Matthew Shawn Wilson - Seattle WA, US

International Classification:

G06F 21/55
G06F 9/50
G06F 9/455

Abstract:

Techniques are described for allocating resources to a task from a shared hardware structure. A plurality of tasks may execute on a processor, wherein the processor may include one or more processing cores and each task may include a plurality of computer executable instructions. In accordance with one technique for allocating resources to a task from a shared hardware structure amongst multiple tasks, aspects of the disclosure describe assigning a first identifier to a first task from the plurality of tasks, associating a portion of the shared hardware resource with the first identifier, and restricting access and/or observability for computer executable instructions executed from any other task than the first task to the portion of the hardware resource associated with the first identifier.