Michael P Leary

US Patent:

6847491, Jan 25, 2005

Filed:

Sep 27, 2000

Appl. No.:

09/672159

Inventors:

Benjamin Bin Jian - Fremont CA, US
Michael H. Leary - Union City CA, US

Assignee:

Arrayed Fiberoptics Corporation - Santa Clara CA

International Classification:

G02B 1100
G02B 2710
G02B 632
G02B 636

US Classification:

359642, 359619, 359620, 385 33, 385 34, 385 93

Abstract:

The disclosed hybrid microlens enables the economical production of large diameter, high numerical aperture refractive microlens by microfabrication. The hybrid microlens has a combination of a refractive microlens formed on a thin layer of high index material such as silicon and a spacer layer of a low index material such as fused silica. Advantages include substantially reduced lens sag, fast etching of the microlens, small wafer stack thickness, large diffraction angle in the low index spacer, large optical beam diameter, high optical performance, and low cost. Also disclosed is a design for substantially reduced optical return signal and small polarization dependent optical loss from an optical fiber which is perpendicular to and butt-coupled to a planar optical surface. This design is to form a small slanted surface on the planar optical surface in the vicinity of the optical fiber core and fill the space between the fiber and the slanted surface with an index-matching optical epoxy.

US Patent:

7016392, Mar 21, 2006

Filed:

Apr 30, 2003

Appl. No.:

10/427585

Inventors:

Ashish Tandon - Palo Alto CA, US
Michael H. Leary - Palo Alto CA, US

International Classification:

H01S 3/08

US Classification:

372 96, 372 92, 372 99, 372 4301, 372 46011, 372 50124

Abstract:

The light-emitting device comprises a substrate, an active region and a tunnel junction structure. The substrate comprises gallium arsenide. The active region comprises an n-type spacing layer and a p-type spacing layer. The tunnel junction structure comprises a p-type tunnel junction layer adjacent the p-type spacing layer, an n-type tunnel junction layer and a tunnel junction between the p-type tunnel junction layer and the n-type tunnel junction layer. The p-type tunnel junction layer comprises a layer of a p-type first semiconductor material that includes gallium and arsenic. The n-type tunnel junction layer comprises a layer of an n-type second semiconductor material that includes indium, gallium and phosphorus. The high dopant concentration attainable in the second semiconductor material reduces the width of the depletion region at the tunnel junction and increases the electrostatic field across the tunnel junction, so that the reverse bias at which tunneling occurs is reduced.

US Patent:

7123638, Oct 17, 2006

Filed:

Oct 17, 2003

Appl. No.:

10/688600

Inventors:

Michael Howard Leary - Mountain View CA, US
Danny E. Mars - Los Altos CA, US
Sungwon David Roh - San Jose CA, US
Danielle R. Chamberlin - San Mateo CA, US

Assignee:

Avago Technologies General IP (Singapore) Pte. Ltd. - Singapore

International Classification:

H01S 3/04
H01L 29/24
H01L 31/0336

US Classification:

372 4301, 257 25, 257104

Abstract:

A tunnel junction structure comprises an n-type tunnel junction layer of a first semiconductor material, a p-type tunnel junction layer of a second semiconductor material and a tunnel junction between the tunnel junction layers. The first semiconductor material includes gallium (Ga), nitrogen (N), arsenic (As) and is doped with a Group VI dopant. The probability of tunneling is significantly increased, and the voltage drop across the tunnel junction is consequently decreased, by forming the tunnel junction structure of materials having a reduced difference between the valence band energy of the material of the p-type tunnel junction layer and the conduction band energy of the n-type tunnel junction layer. Doping the first semiconductor material n-type with a Group VI dopant maximizes the doping concentration in the first semiconductor material, thus further improving the probability of tunneling.

US Patent:

7215848, May 8, 2007

Filed:

Jan 29, 2004

Appl. No.:

10/768858

Inventors:

Michael R. T. Tan - Menlo Park CA, US
William Trutna - Atherton CA, US
David P. Bour - Cupertino CA, US
Michael H. Leary - Mountain View CA, US

Assignee:

Avago Technologies General IP (Singapore) Pte. Ltd. - Singapore

International Classification:

G02B 6/26

US Classification:

385 32, 385 15, 385 31, 385 42

Abstract:

An optical isolator for coupling light from a first waveguide to a second waveguide is disclosed. The optical isolator utilizes a resonator coupled to the first and second optical waveguides. The resonator has a resonance at λ for light traveling from the first optical waveguide to the second optical waveguide; however, the resonator does not have a resonance at λ for light traveling from the second waveguide to the first waveguide. The resonator can use a layer of ferromagnetic material in an applied magnetic field. The magnetic field within the ferromagnetic material varies in strength and/or direction over the layer of ferromagnetic material. The magnetic field can be generated by an external magnetic field that varies over the layer of ferromagnetic material. Alternatively, the resonator can include a layer of ferromagnetic metal that overlies a portion of the layer of ferromagnetic material and a constant external magnetic field.

US Patent:

7573931, Aug 11, 2009

Filed:

Jan 9, 2002

Appl. No.:

10/042590

Inventors:

Michael Renne Ty Tan - Menlo Park CA, US
Chao Kun Lin - Fremont CA, US
Scott W. Corzine - Sunnyvale CA, US
Jintian Zhu - Palo Alto CA, US
Michael H. Leary - Fremont CA, US

Assignee:

Avago Technologies General IP (Singapore) Pte. Ltd. - Singapore

International Classification:

H01S 3/08
H01S 5/343

US Classification:

372 96, 372 4401

Abstract:

A vertical-cavity surface-emitting laser incorporating a supported air gap distributed Bragg reflector is disclosed. The supported air gap DBR includes a regrowth layer of material that provides mechanical support for the original material layers. The supported air gap DBR is fabricated by first growing alternating pairs of a first material and a sacrificial material over a suitable substrate. The layer pairs of the first material and sacrificial material are covered by a suitable dielectric material. The dielectric material is then selectively removed exposing regions of the first material and sacrificial material where selective regrowth of additional material is desired. The selective regrowth of the additional material provides mechanical support for the semiconductor material that remains after a selective etch removal of the sacrificial material.

US Patent:

7977702, Jul 12, 2011

Filed:

Nov 2, 2006

Appl. No.:

11/592486

Inventors:

Michael R. T. Tan - Menlo Park CA, US
Michael H. Leary - Mountain View CA, US

Assignee:

Avago Technologies ECBU IP (Singapore) Pte. Ltd. - Singapore

International Classification:

H01L 33/00

US Classification:

257103, 257 79, 257 95

Abstract:

A light-emitting device that includes an LED and a light extraction layer and the method for making the same are disclosed. The LED includes a substrate on which an active layer is sandwiched between a p-type layer and an n-type layer, the active layer generating light in a band of wavelengths about a central wavelength when holes and electrons recombine therein. The n-type layer, active layer, and p-type layer are formed on the substrate. First and second electrodes for providing a potential difference between the p-type layer and the n-type layer are included in the LED. The light extraction layer includes a clear layer of material having a first surface in contact with a surface of the LED and a second surface having light scattering features with dimensions greater than 0. 5 times the central wavelength. The material of the clear layer can be polycrystalline or amorphous.

US Patent:

20040213312, Oct 28, 2004

Filed:

Apr 25, 2003

Appl. No.:

10/423503

Inventors:

Michael Tan - Menlo Park CA, US
David Dolfi - Los Altos CA, US
Michael Leary - Mountain View CA, US

International Classification:

H01S005/00

US Classification:

372/046000

Abstract:

A laser, a p-spacer, an n-spacer, and an active region is disclosed. The p-spacer has a p-doped region and an undoped region, and the n-spacer has an n-doped region and an undoped region. The active region is located between the undoped regions of the p-spacer and the n-spacer. The active region generates light of wavelength through the recombination of holes and electrons. The undoped region of the p-spacer has a thickness that is different from that of the undoped region of the n-spacer. In one embodiment, the p-spacer has a thickness greater than the n-spacer. If the laser is a VCSEL, the p-spacer and the n-spacer form an optical cavity having a thickness L=(n+1)/2, n is an integer greater than 2. In another embodiment, the cavity has a standing electromagnetic wave and wherein the active layer is located at a maximum of the standing electromagnetic wave.

US Patent:

55485537, Aug 20, 1996

Filed:

Dec 12, 1994

Appl. No.:

8/353603

Inventors:

Elizabeth M. Cooper - Menlo Park CA
Michael Leary - San Jose CA

Assignee:

Digital Equipment Corporation - Maynard MA

International Classification:

G11C 1300

US Classification:

365200

Abstract:

A semiconductor memory device according to the invention includes a main memory array comprising a plurality of memory sub-arrays. Each of the memory sub-arrays comprises a plurality of columns and at least one redundant column. Each column of the memory sub-array also includes multiplexing means, coupled to the input and output path of the respective column and an input and output path of a neighboring column. In addition, the redundant column is coupled to the input and output path of a neighboring column. In the event that one of the columns of the memory sub-array is defective, the multiplexing means of each of the columns between the defective column and the redundant column acts to couple the input and output paths of that column to the input and output paths of the neighboring column. With such an arrangement, the defective column is bypassed and a memory device capable of operating without defects is provided.