Phillip Derrick Mitchell

US Patent:

56714335, Sep 23, 1997

Filed:

Jun 7, 1995

Appl. No.:

8/478313

Inventors:

Henry Tat Fung - San Jose CA
Phillip Merle Mitchell - San Jose CA

Assignee:

Vadem Corporation - San Jose CA

International Classification:

G06F 1336

US Classification:

395800

Abstract:

A distributed computer system comprising a plurality of engines where each engine is useable to form a separate, integrated computer system. The distributed computer system is the functional equivalent of the separate, integrated computer system. An engine on a computer chip has mappable I/O pins that provide selective and mappable access to internal chip locations. A mapper is provided on the chip for mapping the I/O pins. One or more chips with mappable pins are employed to form a computer engine.

US Patent:

56301634, May 13, 1997

Filed:

May 26, 1995

Appl. No.:

8/452246

Inventors:

Henry T. Fung - San Jose CA
Siu K. Tsang - San Jose CA
Phillip M. Mitchell - Milpitas CA
Norman P. Farquhar - San Jose CA

Assignee:

Vadem Corporation - San Jose CA

International Classification:

G06F 1300

US Classification:

395800

Abstract:

A data processing system including a central processing unit and control circuitry on a single chip connected by a common bus to two or more bus devices having different sets of bus parameters. A first set of bus parameters functions as a memory bus for transfers to and from main memory, a second set of bus parameters functions as an I/O bus for I/O device transfers and a third set of bus parameters functions as a video bus for transfers to a video display. Each set of bus parameters has different timing selected to maximize transfers for the particular bus function (main memory, I/O, video or other) implemented by the bus parameters.

US Patent:

59876140, Nov 16, 1999

Filed:

Jun 17, 1997

Appl. No.:

8/877140

Inventors:

Phillip Merle Mitchell - San Jose CA
Francisco Velasco - Los Gatos CA
Xuyen N. Phung - San Jose CA

Assignee:

Vadem - San Jose CA

International Classification:

G06F 132

US Classification:

713300

Abstract:

Structure and method are provided for reducing power consumption in a computer system without sacrificing computer performance or inhibiting a computer user's rapid access to the computer. An identifier, such as a device address, network address, serial number, and the like, is associated with each device or resource. Communications over a communications link such as a parallel bus, serial bus, or wireless link, are monitored by each device to determine device identifiers communicated over the link, and these identifiers are compared to the identifier associated with the monitoring device. Each device monitors the communications and is responsible for self-controlling its operating condition to minimize power consumption. Each device includes a first component which operates continuously to provide the monitoring function, and a second component that operates in a low power consumption mode unless the first component signals the second component that its operation is needed during that time period. Typically, the first component withholds a device operating input, for example a clock signal, from the second component when none of the communicated identifiers match the particular device; and provide the operating input when one matches.

US Patent:

46623442, May 5, 1987

Filed:

Jan 14, 1985

Appl. No.:

6/691399

Inventors:

Phillip J. Mitchell - Fenton MI

International Classification:

F41B 700
F41B 500

US Classification:

124 22

Abstract:

An archery device 10 includes a frame 12 and a handle section 14. A drawstring 24 spans the frame and has first and second ends 30,32 formed of an elastomeric material and an intermediate section 34 of conventional drawstring material. A pulley 44 or 46 is associated with each end of the drawstring to facilitate the drawing back thereof. The elastomeric ends of the drawstring are adjustably secured to the frame. The frame has an elbow-engaging stabilizer which is rotatable for use by either a right or left-handed operator.

US Patent:

58226109, Oct 13, 1998

Filed:

Nov 22, 1996

Appl. No.:

8/754842

Inventors:

Henry Tat Fung - San Jose CA
Phillip Merle Mitchell - San Jose CA

Assignee:

Vadem Corporation - San Jose CA

International Classification:

G06F 1336

US Classification:

39580039

Abstract:

A distributed computer system comprising a plurality of engines where each engine is useable to form a separate, integrated computer system. The distributed computer system is the functional equivalent of the separate, integrated computer system. An engine on a computer chip has mappable I/O pins that provide selective and mappable access to internal chip locations. A mapper is provided on the chip for mapping the I/O pins. One or more chips with mappable pins are employed to form a computer engine.