Rudolf Strasser

US Patent:

7550854, Jun 23, 2009

Filed:

Mar 19, 2003

Appl. No.:

10/514145

Inventors:

Rudolf Strasser - Wappingers Falls NY, US

Assignee:

Infineon Technologies AG - Munich

International Classification:

H01L 23/48
H01L 23/52

US Classification:

257776, 257531, 257664, 257758, 257E2317

Abstract:

An explanation is given of an integrated interconnect arrangement having a plurality of interconnects that cross over one another at two crossover sections. By virtue of this measure, it is possible to achieve a uniform current flow in all three interconnects even at very high frequencies.

US Patent:

20050218446, Oct 6, 2005

Filed:

May 19, 2005

Appl. No.:

11/133086

Inventors:

Matthias Hierlemann - Fishkill NY, US
Rudolf Strasser - Wappingers Falls NY, US

International Classification:

H01L027/108

US Classification:

257330000

Abstract:

A field-effect transistor (FET) structure and method of formation thereof is presented. The FET structure includes first and second source/drain regions formed in a semiconductor substrate to define a channel region. A gate insulation layer is formed at a surface of the channel region. A control layer is formed at a surface of the gate insulation layer. A diode doping region is formed to realize a diode in the semiconductor substrate. An electrically conductive diode connection layer connects the diode doping region to the control layer. A depression is formed in the semiconductor substrate. The diode doping region is formed at a bottom of the depression and the diode connection layer is formed in the depression to dissipate excess charge carriers in the semiconductor substrate.