Scott James Hunt

US Patent:

7872305, Jan 18, 2011

Filed:

Jun 26, 2008

Appl. No.:

12/146791

Inventors:

Scott L. Hunt - West Jordan UT, US

Assignee:

Fairchild Semiconductor Corporation - South Portland ME

International Classification:

H01L 29/76
H01L 29/94
H01L 31/062
H01L 31/113
H01L 31/119

US Classification:

257330, 257331, 257E27091

Abstract:

A shielded gate field effect transistor (FET) comprises a plurality of trenches extending into a semiconductor region. A shield electrode is disposed in a bottom portion of each trench, and a gate electrode is disposed over the shield electrode in each trench. An inter-electrode dielectric (IED) extends between the shield electrode and the gate electrode. The IED comprises a first oxide layer and a nitride layer over the first oxide layer.

US Patent:

8129241, Mar 6, 2012

Filed:

Dec 2, 2010

Appl. No.:

12/958689

Inventors:

Scott L. Hunt - West Jordan UT, US

Assignee:

Fairchild Semiconductor Corporation - South Portland ME

International Classification:

H01L 21/336

US Classification:

438259, 438270, 257E21655

Abstract:

A method for forming a shielded gate field effect transistor (FET) includes forming a plurality of trenches in a semiconductor region and forming a shield electrode in a bottom portion of each trench. The method also includes forming a dielectric layer comprising a first oxide layer and a nitride layer both laterally extending over the shield electrode. The method also includes forming a gate electrode over the dielectric layer.

US Patent:

8278702, Oct 2, 2012

Filed:

Sep 16, 2008

Appl. No.:

12/211654

Inventors:

James Pan - West Jordan UT, US
Scott L. Hunt - West Jordan UT, US
Dean E. Probst - West Jordan UT, US
Hossein Paravi - Sandy UT, US

Assignee:

Fairchild Semiconductor Corporation - South Portland ME

International Classification:

H01L 29/66

US Classification:

257330, 257E29262

Abstract:

A semiconductor structure comprises trenches extending into a semiconductor region. Portions of the semiconductor region extend between adjacent trenches forming mesa regions. A gate electrode is in each trench. Well regions of a first conductivity type extend in the semiconductor region between adjacent trenches. Source regions of a second conductivity type are in the well regions. Heavy body regions of the first conductivity type are in the well regions. The source regions and the heavy body regions are adjacent trench sidewalls, and the heavy body regions extend over the source regions along the trench sidewalls to a top surface of the mesa regions.