Sriram Mysore

US Patent:

63083035, Oct 23, 2001

Filed:

Apr 26, 1999

Appl. No.:

9/299302

Inventors:

Sriram Mysore - San Jose CA
Wilsin Gosti - Freemont CA

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

G06F 1750

US Classification:

716 5

Abstract:

Methods and systems provide a tool to assist a designer in selecting interconnect widths which improve both signal time propagation and maintain a reliable conductor. Downstream capacitance(s) of interconnects is evaluated, and a current which the interconnect conducts is also evaluated. The capacitance and current information is used to determine a conductor width which maintains physical reliability. The methods and systems also allow the conductor widths to be determined based upon signal propagation concerns, such that in interconnect networks where signal timing is critical, the conductor widths can be reduced while maintaining a reliable conductor.