Vinh Tran Dang

US Patent:

7201803, Apr 10, 2007

Filed:

Dec 9, 2003

Appl. No.:

10/731651

Inventors:

Siqing Lu - San Jose CA, US
Yu Chang - San Jose CA, US
Dongxi Sun - Cupertino CA, US
Vinh Dang - San Jose CA, US
Michael X. Yang - Palo Alto CA, US
Anzhong (Andrew) Chang - San Jose CA, US
Anh N. Nguyen - Milpitas CA, US
Ming Xi - Milpitas CA, US

Assignee:

Applied Materials, Inc. - Santa Clara CA

International Classification:

B05C 11/00

US Classification:

118710

Abstract:

A valve control system for a semiconductor processing chamber includes a system control computer and a plurality of electrically controlled valves associated with the processing chamber. The system further includes a programmable logic controller in communication with the system control computer and operatively coupled to the electrically controlled valves. The refresh time for control of the valves may be less than 10 milliseconds. Consequently, valve control operations do not significantly extend the period of time required for highly repetitive cycling in atomic layer deposition processes. A hardware interlock may be implemented through the output power supply of the programmable logic controller.

US Patent:

20020127745, Sep 12, 2002

Filed:

Mar 7, 2001

Appl. No.:

09/800881

Inventors:

Siqing Lu - San Jose CA, US
Yu Chang - San Jose CA, US
Dongxi Sun - Cupertino CA, US
Vinh Dang - San Jose CA, US
Michael Yang - Palo Alto CA, US
Anzhong Chang - San Jose CA, US
Anh Nguyen - Milpitas CA, US
Ming Xi - Milpitas CA, US

International Classification:

H01L021/66
G01R031/26
C23F001/00
C23C016/00

US Classification:

438/014000, 156/345260, 118/715000, 118/712000

Abstract:

A valve control system for a semiconductor processing chamber includes a system control computer and a plurality of electrically controlled valves associated with the processing chamber. The system further includes a programmable logic controller in communication with the system control computer and operatively coupled to the electrically controlled valves. The refresh time for control of the valves may be less than 10 milliseconds. Consequently, valve control operations do not significantly extend the period of time required for highly repetitive cycling in atomic layer deposition processes. A hardware interlock may be implemented through the output power supply of the programmable logic controller.