William Chiachieh Yao

US Patent:

7265327, Sep 4, 2007

Filed:

Feb 9, 2004

Appl. No.:

10/775592

Inventors:

Byung Park - San José CA, US
Richard Weisfield - Los Altos Hills CA, US
William Yao - Los Altos CA, US

Assignee:

dpiX, L.L.C. - Palo Alto CA

International Classification:

H01L 27/00

US Classification:

2502081, 348302

Abstract:

Photodetecting devices or arrays and methods of making such devices or arrays. In one exemplary embodiment, a photodetecting array includes a plurality of detecting cells arranged in an array, each of the detecting cells including a photodiode, a plurality of data lines coupled to the detecting cells, and a mesh of bias voltage lines which comprise first bias lines disposed substantially parallel to gate lines which are coupled to the detecting cells and second bias lines disposed substantially perpendicularly to the gate lines, wherein the total length of the first bias lines exceeds a total length of the second bias lines.

US Patent:

7532264, May 12, 2009

Filed:

Dec 20, 2004

Appl. No.:

11/019739

Inventors:

Quan Yuan - Milpitas CA, US
Richard Weisfield - Mt. View CA, US
William Yao - Los Altos CA, US

Assignee:

DPIX LLC - Palo Alto CA

International Classification:

G02F 1/1333
G02F 1/1343

US Classification:

349 40, 349139, 349143, 361 911

Abstract:

An ESD protection system for an image sensor array includes a two-dimensional array of pixels formed on a substrate. Each of the pixels is connected to a gate line and a data line. The system includes a common ESD bus and at least one ESD protection circuit formed on the substrate. The protection circuit includes: a pair of thin film transistors connected in a back-to-back configuration with a first terminal connected to one of the gate lines, and a second terminal connected to the common ESD bus. Upon the occurrence of an electrostatic discharge onto the gate line causing the voltage across the terminals to exceed a threshold value, the protection circuit discharges the ESD charge from the gate line to the ESD bus, thereby preventing damage to each of the switching transistors in the pixels connected to the gate line.

US Patent:

8232531, Jul 31, 2012

Filed:

Mar 29, 2007

Appl. No.:

11/731170

Inventors:

George Zentai - Mountain View CA, US
Larry Partain - Los Altos CA, US
William Wei-Yu Yao - Los Altos CA, US
Richard Weisfield - Los Altos CA, US

Assignee:

Varian Medical Systems, Inc. - Palo Alto CA
dpiX, LLC - Palo Alto CA

International Classification:

H01L 25/00

US Classification:

25037012

Abstract:

Improved corrosion resistance for direct X-ray imaging detectors is obtained by providing a pixelated, electrically conductive barrier layer between the X-ray sensitive material and the pixel electrodes. Each barrier layer can cover part or all of its corresponding pixel electrode. In cases where pixel electrodes makes contact to underlying circuitry through vertical vias, it is preferred for the barrier layers to cover the via sections of the pixel electrodes. The barrier layers for each pixel electrode can be spaced apart from each other, or they can all be included within a continuous film on top of the pixel electrodes. Such a continuous film can be pixelated by spatially modulating its properties (e. g. , thickness, doping) to significantly reduce lateral conductivity from pixel to pixel.

US Patent:

54913470, Feb 13, 1996

Filed:

Apr 28, 1994

Appl. No.:

8/235011

Inventors:

Robert R. Allen - late of San Francisco CA
Richard H. Bruce - Los Altos CA
Tzu-Chin Chuang - Saratoga CA
Thomas G. Fiske - Campbell CA
Ronald T. Fulks - Mountain View CA
Michael Hack - Mountain View CA
Jackson H. Ho - Palo Alto CA
Alan G. Lewis - Sunnyvale CA
Russel A. Martin - Menlo Park CA
Louis D. Silverstein - Scottsdale AZ
Hugo L. Steemers - Palo Alto CA
Susan M. Stuber - Redwood City CA
Malcolm J. Thompson - Palo Alto CA
William D. Turner - San Marino CA
William W. Yao - Los Altos CA

Assignee:

Xerox Corporation - Stamford CT

International Classification:

H01L 3300

US Classification:

257 59

Abstract:

A thin-film structure on an insulating substrate includes an array of binary control units with an area of at least 90 cm. sup. 2 and a density of at least 60 binary control units per cm. One implementation has an area of approximately 510 cm. sup. 2, a diagonal of approximately 33 cm, and a total of approximately 6. 3 million binary control units. Each binary control unit has a lead for receiving a unit drive signal, to which it responds by causing presentation of a segment of images presented by the array. Each binary control unit can present a segment with either a first color having a maximum intensity or a second color having a minimum intensity. Each binary control unit's unit drive signal causes the binary control unit to present its first and second colors. The substrate can be glass. Each binary control unit can include an amorphous silicon thin-film transistor (TFT) and a storage capacitor.

US Patent:

59593121, Sep 28, 1999

Filed:

Sep 27, 1996

Appl. No.:

8/714934

Inventors:

William W. Yao - Los Altos CA
Ronald T. Fulks - Mountain View CA

Assignee:

Xerox Corporation - Stamford CT

International Classification:

G01T 124

US Classification:

257 57

Abstract:

A sensor device includes a sensing element and a thin film transistor (TFT), and the TFT's channel leads include semiconductor channel leads formed in a layer of microcrystalline silicon (. mu. c-Si). The sensing element is formed in a semiconductor layer that includes silicon-based material and is over the. mu. c-Si layer. Each of the semiconductor channel leads has a structure that prevents formation of bubbles at the lower and upper sides of the. mu. c-Si layer during production of the sensing element. The TFT's channel can be formed in a layer of intrinsic silicon-based material under the. mu. c-Si layer and the. mu. c-Si layer can be a deposited doped layer; or the TFT's channel can be formed in an intrinsic. mu. c-Si layer in which the leads are formed by implanting a dopant. The. mu. c-Si layer can include a sufficiently small amount of hydrogen to prevent formation of bubbles; it can include crystalline grain structures permitting hydrogen to dissipate at a sufficient rate to prevent formation of bubbles; or it can have interfaces sufficiently stable to prevent formation of bubbles.

US Patent:

58672427, Feb 2, 1999

Filed:

Apr 1, 1997

Appl. No.:

8/840443

Inventors:

William W. Yao - Los Altos CA
Ronald T. Fulks - Mountain View CA

Assignee:

Xerox Corporation - Stamford CT

International Classification:

G02F 1136
G02F 11333

US Classification:

349122

Abstract:

The present invention is a novel pixel structure, and method for making the same, that reduces wasteful voltage drop associated with other pixel structures that cover their pixel elements with a final passivation layer. The presently claimed pixel structure is a combination of a thin film transistor (TFT), an associated pixel element, and a passivation layer. The TFT is first deposited atop a suitable substrate and patterned. Then, the passivation layer is deposited on top of the thin film transistor. Contact cuts are made into the passivation layer where the pixel element is to contact the TFT. Finally, the pixel element is deposited--lying atop the passivation layer and contacting with the underlying TFT where the contact cuts were made in the passivation layer.

US Patent:

58145303, Sep 29, 1998

Filed:

Sep 27, 1996

Appl. No.:

8/721813

Inventors:

William W. Yao - Los Altos CA
Ronald T. Fulks - Mountain View CA

Assignee:

Xerox Corporation - Stamford CT

International Classification:

H01L 2100

US Classification:

438 30

Abstract:

In producing a sensor device with a sensing element and a thin film transistor, a semiconductor layer with microcrystalline silicon (. mu. c-Si) is produced in which semiconductor channel leads are formed. The. mu. c-Si has a structure that prevents formation of bubbles at the sides of the semiconductor layer during subsequent production of a sensing element in a silicon-based layer. The semiconductor layer can be a deposited doped layer of. mu. c-Si, or a layer of intrinsic. mu. c-Si can be doped. The. mu. c-Si layer can be deposited with a sufficiently small amount of hydrogen to prevent formation of bubbles; it can be deposited with crystalline grain structures permitting hydrogen to dissipate at a sufficient rate to prevent formation of bubbles; or its interfaces can be formed with sufficiently stability to prevent formation of bubbles.

US Patent:

56822111, Oct 28, 1997

Filed:

May 31, 1995

Appl. No.:

8/455888

Inventors:

William Yao - Los Altos CA
Ronald T. Fulks - Mountain View CA
Jackson Ho - Palo Alto CA

Assignee:

Xerox Corporation - Stamford CT

International Classification:

G02F 11343
G02F 1136

US Classification:

349 38

Abstract:

The invention provides an integrated dark matrix for an active matrix liquid crystal display. A plurality of pixel electrodes overlap at least one of a plurality of gate lines and a plurality of data lines. A perimeter of the pixel electrodes overlaps the gate lines and/or data lines by twice the distance that the pixel electrode is above the gate and data lines, respectively to obtain a viewing angle of over 60 degrees.