Xiang Zeng

US Patent:

20120193133, Aug 2, 2012

Filed:

Jan 27, 2011

Appl. No.:

13/015132

Inventors:

David M. Eaves - Redondo Beach CA, US
Xiang Zeng - Monterey Park CA, US
Kelly J. Hennig - Torrance CA, US
Patty Chang-Chien - Redondo Beach CA, US

Assignee:

Northrop Grumman Systems Corporation - Los Angeles CA

International Classification:

H05K 1/18

US Classification:

174262

Abstract:

A wafer-scale assembly circuit including a plurality of metal interconnect layers, where each metal layer includes patterned metal portions and where at least some of the patterned metal portions are RF signal lines. The circuit further includes at least one benzocyclobutene layer provided between two metal interconnect layers that includes at least one trench via formed around a perimeter of the benzocyclobutene layer at a circuit sealing ring, where the trench via provides a hermetic seal at the sealing ring. The benzocyclobutene layer also includes a plurality of stabilizing post vias formed through the benzocyclobutene layer adjacent to the trench via proximate to the sealing ring and extending around the perimeter of the benzocyclobutene layer, where the stabilizing vias operate to prevent the benzocyclobutene layer from shrinking in size.