Yong Lu Lu

US Patent:

6424561, Jul 23, 2002

Filed:

Jul 18, 2000

Appl. No.:

09/618504

Inventors:

Shaoping Li - Naperville IL
Theodore Zhu - Maple Grove MN
Anthony S. Arrott - Washington DC
Harry Liu - Plymouth MN
William L. Larson - Eden Prairie MN
Yong Lu - Plymouth MN

Assignee:

Micron Technology, Inc. - Boise ID

International Classification:

G11C 1100

US Classification:

365158, 365171, 365173

Abstract:

MRAM architectures are disclosed that produce an increased write margin and write selectivity without significantly reducing the packing density of the memory. The major axes of the magneto-resistive bits are offset relative to the axes of the digital lines to produce a magnetic field component from the digital line current that extends along the major axis of the magneto-resistive bits.

US Patent:

6424564, Jul 23, 2002

Filed:

Sep 26, 2001

Appl. No.:

09/964217

Inventors:

Shaoping Li - Naperville IL
Theodore Zhu - Maple Grove MN
Anthony S. Arrott - Washington DC
Harry Liu - Plymouth MN
William L. Larson - Eden Prairie MN
Yong Lu - Plymouth MN

Assignee:

Micron Technology, Inc. - Boise ID

International Classification:

G11C 1100

US Classification:

365158, 365171, 365173, 365 66

Abstract:

MRAM architectures are disclosed that produce an increased write margin and write selectivity without significantly reducing the packing density of the memory. The major axes of the magneto-resistive bits are offset relative to the axes of the digital lines to produce a magnetic field component from the digital line current that extends along the major axis of the magneto-resistive bits.

US Patent:

6522574, Feb 18, 2003

Filed:

Sep 25, 2001

Appl. No.:

09/964218

Inventors:

Shaoping Li - Naperville IL
Theodore Zhu - Maple Grove MN
Anthony S. Arrott - Washington DC
Harry Liu - Plymouth MN
William L. Larson - Eden Prairie MN
Yong Lu - Plymouth MN

Assignee:

Micron Technology, Inc. - Boise ID

International Classification:

G11C 1100

US Classification:

365158, 365171, 365173, 365 66

Abstract:

MRAM architectures are disclosed that produce an increased write margin and write selectivity without significantly reducing the packing density of the memory. The major axes of the magneto-resistive bits are offset relative to the axes of the digital lines to produce a magnetic field component from the digital line current that extends along the major axis of the magneto-resistive bits.

US Patent:

6756240, Jun 29, 2004

Filed:

Jul 7, 2003

Appl. No.:

10/614622

Inventors:

Shaoping Li - Naperville IL
Theodore Zhu - Maple Grove MN
Anthony S. Arrott - Washington DC
Harry Liu - Plymouth MN
William L. Larson - Eden Prairie MN
Yong Lu - Plymouth MN

Assignee:

Micron Technology, Inc. - Boise ID

International Classification:

H01L 2100

US Classification:

438 3, 438238, 438381

Abstract:

MRAM architectures are disclosed that produce an increased write margin and write selectivity without significantly reducing the packing density of the memory. The major axes of the magneto-resistive bits are offset relative to the axes of the digital lines to produce a magnetic field component from the digital line current that extends along the major axis of the magneto-resistive bits.

US Patent:

6791856, Sep 14, 2004

Filed:

Dec 20, 2002

Appl. No.:

10/327581

Inventors:

Shaoping Li - Naperville IL
Theodore Zhu - Maple Grove MN
Anthony S. Arrott - Washington DC
Harry Liu - Plymouth MN
William L. Larson - Eden Prairie MN
Yong Lu - Plymouth MN

Assignee:

Micron Technology, Inc. - Boise ID

International Classification:

G11C 506

US Classification:

365 63, 365158, 365171, 365173

Abstract:

MRAM architectures are disclosed that produce an increased write margin and write selectivity without significantly reducing the packing density of the memory. The major axes of the magneto-resistive bits are offset relative to the axes of the digital lines to produce a magnetic field component from the digital line current that extends along the major axis of the magneto-resistive bits.

US Patent:

6992918, Jan 31, 2006

Filed:

Jul 7, 2003

Appl. No.:

10/614709

Inventors:

Shaoping Li - Naperville IL, US
Theodore Zhu - Maple Grove MN, US
Anthony S. Arrott - Washington DC, US
Harry Liu - Plymouth MN, US
William L. Larson - Eden Prairie MN, US
Yong Lu - Plymouth MN, US

Assignee:

Micron Technology, Inc. - Boise ID

International Classification:

G11C 11/00

US Classification:

365158, 365171, 365173

Abstract:

MRAM architectures are disclosed that produce an increased write margin and write selectivity without significantly reducing the packing density of the memory. The major axes of the magneto-resistive bits are offset relative to the axes of the digital lines to produce a magnetic field component from the digital line current that extends along the major axis of the magneto-resistive bits.