Yu U Xu

US Patent:

7460040, Dec 2, 2008

Filed:

May 29, 2007

Appl. No.:

11/754670

Inventors:

Thungoc M. Tran - San Jose CA, US
Yu Xu - Palo Alto CA, US
Kwong-Wen Wei - Sunnyvale CA, US

Assignee:

Altera Corporation - San Jose CA

International Classification:

H03M 9/00

US Classification:

341100, 375354

Abstract:

A high-speed serial interface for a programmable logic device includes a plurality of features to handle the various issues that may arise with data rates over 1 Gbps and particularly over 1. 25 Gbps. Those features may include dynamic phase alignment to control clock-data skew, data realignment (e. g. , bit slip circuitry) to account for channel-to-channel skew, full-duplex serializer and deserializer, out-of-range frequency support for low frequencies, and a soft-CDR mode.

US Patent:

7555667, Jun 30, 2009

Filed:

Jul 17, 2006

Appl. No.:

11/488365

Inventors:

Ali Burney - Fremont CA, US
Yu Xu - Palo Alto CA, US
Leon Zheng - Santa Clara CA, US
Sanjay K. Charagulla - San Jose CA, US

Assignee:

Altera Corporation - San Jose CA

International Classification:

G06F 1/04
G06F 1/06

US Classification:

713401, 713501, 713503

Abstract:

Adjustable transceiver circuitry is provided for programmable integrated circuits. The transceiver circuitry has a dynamic phase alignment circuit that can be used for aligning clock and data signals. The transceiver circuitry supports a phase-locked-loop source synchronous mode that can be used to receive data from transmitting integrated circuits that are clocked with a common clock. Each transmitting integrated circuit transmits a clock and associated data signals over a bus. The transceiver circuitry uses a master-slave architecture. A master dynamic phase alignment circuit in each transceiver receives the clock for that bus and selects a corresponding optimal clock phase to use in receiving input data for the bus from a multiphase clock. The master dynamic phase alignment circuit in each transceiver distributes the optimal clock phase to associated slave dynamic phase alignment circuits. Only a single phase-locked loop circuit is need to generate the multiphase clock.

US Patent:

8253451, Aug 28, 2012

Filed:

Jun 16, 2010

Appl. No.:

12/817126

Inventors:

Cheng Hsiang Hsieh - Los Gatos CA, US
Mengchi Liu - Fremont CA, US
Yu Xu - Palo Alto CA, US

Assignee:

Xilinx, Inc. - San Jose CA

International Classification:

H03L 7/00

US Classification:

327141, 327157, 327161

Abstract:

A clock data recovery module and a method of operation thereof are described. In an embodiment, a data stream is received. Transitions in the data stream are detected to provide phase signaling for indicating phase relationships to the transitions detected. A lock detector receives the phase signaling. The lock detector accumulates phase information from the phase signaling and temporarily stores an accumulated total of the phase information representative of a code change, and the lock detector determines whether the code change is within a set range over a time period and resets the accumulated total at a conclusion of the time period.

US Patent:

8566847, Oct 22, 2013

Filed:

Mar 11, 2011

Appl. No.:

13/046449

Inventors:

Robert Ling - San Jose CA, US
Yu Xu - Folsom CA, US
Sunil A. Bhagia - Olympia WA, US

Assignee:

Cisco Technology, Inc. - San Jose CA

International Classification:

G06F 9/44

US Classification:

719328, 719318, 719323, 710 22, 710 26, 710301, 709203, 709217, 709221

Abstract:

Techniques presented herein provide approaches for out-of-band host management via a management controller. In one embodiment, the management controller provides an application programming interface (API) specifying one or more functions for managing one or more applications executing on a host computer. The one or more functions may be invoked by a requesting entity.

US Patent:

20130173589, Jul 4, 2013

Filed:

Dec 29, 2011

Appl. No.:

13/340300

Inventors:

Yu Xu - Burlingame CA, US
Ahmad Said Ghazal - Redondo Beach CA, US

International Classification:

G06F 17/30

US Classification:

707714, 707E17017

Abstract:

Techniques for optimizing outer joins in database operations are provided. In an embodiment, a query having an outer join with a GROUP BY clause is rewritten and expanded to expand a first level partition of that GROUP BY clause to produce a modified query. In another situation, rows associated with processing a query are each row split and then hashed based at least in part on attributes of the outer join predicate. A left outer join is performed and a global aggregation processed to produce a spooled table to process the query.

US Patent:

20130173594, Jul 4, 2013

Filed:

Dec 29, 2011

Appl. No.:

13/340324

Inventors:

Yu Xu - Burlingame CA, US
Olli Pekka Kostamaa - Santa Monica CA, US

International Classification:

G06F 17/30

US Classification:

707722, 707E17014, 707E17046, 707E17005

Abstract:

Techniques for accessing a parallel database system via an external program using vertical and/or horizontal partitioning are provided. An external program to a database management system (DBMS) configures external mappers to process a specific portion of query results on specific access module processors of the DBMS that are to house query results. The query is submitted by the external program to the DBMS and the DBMS is directed to organize the query results in a vertical or horizontal manner. Each external mapper accesses its portion of the query results for processing in parallel on its designated AMP or set of AMPS to process the query results.

US Patent:

20130173595, Jul 4, 2013

Filed:

Dec 29, 2011

Appl. No.:

13/340357

Inventors:

Yu Xu - Burlingame CA, US
Olli Pekka Kostamaa - Santa Monica CA, US

International Classification:

G06F 17/30

US Classification:

707722, 707E1701, 707E17014

Abstract:

Techniques for external application-directed data partitioning in data exported from a parallel database management system (DBMS) are provided. An external application sends a query, a total number of requested access module processors (AMPs), and an application-defined data partitioning expression to the DBMS. The DBMS executes the query with the results vertical partitioned on the identified number of AMPs. Individual external mappers access their assigned AMPs asking for specific partitions that they are assigned to process the query results.

US Patent:

20130173615, Jul 4, 2013

Filed:

Dec 29, 2011

Appl. No.:

13/340364

Inventors:

Yu Xu - Burlingame CA, US

International Classification:

G06F 17/30

US Classification:

707736, 707E17005

Abstract:

Techniques for fast loading data from an external distributed file system (DFS) to a database management system (DBMS) are provided. Assigning a portion of data from a file located in the DFS to each of a plurality of DFS clients. Configuring each DFS client to interact with a specific gateway from a plurality of gateways associated with the DBMS. Each gateway configured to send its portion of the file received from its designated client to every access module processor (AMP) controlled by that gateway. Each AMP processes a portion of the data received from the gateway to load the data into a table of the DBMS.