Alina Deutsch

US Patent:

6342823, Jan 29, 2002

Filed:

Aug 26, 1998

Appl. No.:

09/140643

Inventors:

Allan Harvey Dansky - Poughkeepsie NY
Alina Deutsch - Chappaqua NY
Gerard Vincent Kopcsay - Yorktown Heights NY
Phillip John Restle - Katonah NY
Howard Harold Smith - Beacon NY

Assignee:

International Business Machines Corp. - Armonk NY

International Classification:

H01P 500

US Classification:

333 1, 333 99 R

Abstract:

A method and system for reducing the computation complexity and improving accuracy of delay and crosstalk calculation in transmission-lines with frequency-dependent losses. An analysis tool based on restricted coupled-line topologies, simple two-dimensional to three-dimensional RLC matrix conversion, and use of prestored synthesized circuits that accurately capture frequency-dependent loss effects. The CAD tool can handle frequency-dependent resistive and inductive effects for coupled-interconnections on large microprocessor chips with 10K of critical nets. This is done in an interactive manner during the design cycle and allows first path fast product design.

US Patent:

6418401, Jul 9, 2002

Filed:

Feb 11, 1999

Appl. No.:

09/248667

Inventors:

Allan H. Dansky - Poughkeepsie NY
Alina Deutsch - Chappaqua NY
Gerard V. Kopcsay - Yorktown Heights NY
Phillip J. Restle - Katonah NY
Howard H. Smith - Beacon NY

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 1750

US Classification:

703 27, 703 13, 703 19, 716 4, 716 6

Abstract:

A method for reducing the computation time and improving the productivity in designing high-performance microprocessor chips that have no failuresâdue to crosstalk noise. The technique allows a very fast calculation of tables of frequency-dependent circuit parameters needed for accurate crosstalk prediction on lossy on-chip interconnections. These tables of parameters are the basis for CAD tools that perform crosstalk checking on 10K critical nets on typical microprocessor chips. A fast table generation allows for rapid incorporation of design or processing changes and transition to more advanced technologies.

US Patent:

6546529, Apr 8, 2003

Filed:

Oct 2, 2000

Appl. No.:

09/677362

Inventors:

Allan H. Dansky - Poughkeepsie NY
Michael A. Bowen - Poughkeepsie NY
Peter J. Camporese - Hopewell Junction NY
Alina Deutsch - Chappaqua NY
Howard H. Smith - Beacon NY

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 945

US Classification:

716 5, 716 4, 716 6

Abstract:

Deterministic evaluation of coupling noise voltage is a function of many physical and electrical parameters such as wiring level, widths, spacing, net topologies, drv impedance and slew rates. This evaluation requires electrical modeling and subsequent circuit simulation to assess the sensitivities of these parameters. These sensitivities can be categorized as coupling guidelines that can be directly linked through extracted physical design data. This invention discloses the development and implementation of a technique for using a coupling guideline table early in the design of an integrated circuit when all the parameters generally required for coupling noise voltage calculations are not available. The steps include: creating a flat wire routing map of the integrated circuit, identifying the coupled wire segments on the integrated circuit, tracking wire interconnection patterns on the integrated circuit, deriving electrical parameters for the coupled wire segments, and generating a coupling guideline table with parameters for a plurality of electrical parameters. The parameters in the coupling guideline table are applied to the derived electrical parameters and a report is generated that lists the derived electrical parameters that fail to comply with the parameters in the coupling guideline table.

US Patent:

6963204, Nov 8, 2005

Filed:

Apr 6, 2004

Appl. No.:

10/818578

Inventors:

Alina Deutsch - Chappaqua NY, US
Gerard V. Kopcsay - Yorktown Heights NY, US
Byron L. Krauter - Round Rock TX, US
Barry J. Rubin - Croton-on-Hudson NY, US
Howard H. Smith - Beacon NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G01R029/26
G01R021/00
G06F017/50

US Classification:

324613, 702 60, 716 4

Abstract:

The present invention relates to a method for analyzing the noise prediction within one or more electrical circuits, wherein the electrical circuits have a power mesh grid distribution system that feeds power levels to the electrical circuits that are connected by signal wires. After identifying a driver and receiver electrical circuit to be analyzed, a power block is generated that is associated with the driver and receiver electrical circuit by partitioning an area of a power mesh grid distribution system into a power block that can be modeled with lossy transmission line techniques. Next, signal wires situated between the driver and receiver electrical circuits are partitioned into signal blocks that can be modeled with lossy transmission line techniques. Lastly, the power blocks and signal blocks associated with the electrical circuits are analyzed in order to predict the noise performance within the electrical circuits.

US Patent:

7006931, Feb 28, 2006

Filed:

Feb 11, 2004

Appl. No.:

10/776716

Inventors:

Alina Deutsch - Chappaqua NY, US
Peter Feldmann - New York NY, US
Albert E. Ruehli - Chappaqua NY, US
Howard Harold Smith - Beacon NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G01R 15/00

US Classification:

702 57, 333116

Abstract:

A system and method for analyzing a circuit with transmission lines includes determining which sources influence each of a plurality of transmission lines, based on coupling factors. Transmission line parameters are computed based on the sources, which influence each transmission line. A transient response or frequency response is analyzed for each transmission line by segmenting each line to perform an analysis on that line. The step of analyzing is repeated using waveforms determined in a previous iteration until convergence to a resultant waveform has occurred.

US Patent:

7093206, Aug 15, 2006

Filed:

Oct 21, 2003

Appl. No.:

10/690238

Inventors:

Matthew S. Angyal - Stormville NY, US
Alina Deutsch - Chappaqua NY, US
Ibrahim M. Elfadel - Ossining NY, US
Gerard V. Kopcsay - Yorktown Heights NY, US
Barry J. Rubin - Croton-on-Hudson NY, US
Howard H. Smith - Beacon NY, US

Assignee:

International Business Machines Corp. - Armonk NY

International Classification:

G06F 17/50

US Classification:

716 1, 703 14

Abstract:

A computer aided design (CAD) system. A template generation engine generates templates from interconnect configuration files. A field solver generates high frequency passive element relationships from the templates. A circuit builder generates circuit description files from device technology models and from high frequency passive element relationships. Parameterized circuit description models may be generated for large range of sensitivity analyses. A simulator simulates circuit responses for transmission line models from the circuit description files. Interconnect configuration files may be generated by a geometry and material definition module that receives process description data from a designer.

US Patent:

7319946, Jan 15, 2008

Filed:

Oct 21, 2002

Appl. No.:

10/274861

Inventors:

Michael A. Bowen - Wallkill NY, US
Alina Deutsch - Chappaqua NY, US
Gerard V. Kopcsay - Yorktown Heights NY, US
Byron L. Krauter - Leander TX, US
Barry J. Rubin - Croton-on-Hudson NY, US
Howard H. Smith - Beacon NY, US
David J. Widiger - Austin TX, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 17/50
G06G 7/62
G06G 7/48

US Classification:

703 13, 703 14, 703 18, 703 3

Abstract:

New Frequency dependent RLC extraction and modeling for on chip integrity and noise verification employs:.

US Patent:

7480605, Jan 20, 2009

Filed:

Jan 18, 2005

Appl. No.:

11/037531

Inventors:

Matthew Stephen Angyal - Stormville NY, US
Alina Deutsch - Chappaqua NY, US
Ibrahim M. Elfadel - Ossining NY, US
Zhichao Zhang - Tempe AZ, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 17/50

US Classification:

703 14, 703 13, 703 6, 716 1, 716 2, 716 10, 716 6, 438692

Abstract:

Techniques are disclosed for determination of parameter variability for one or more given interconnects of a plurality of interconnects in a simulated semiconductor circuit. The simulated semiconductor circuit is defined at least in part by a plurality of input parameters. From a distribution of first values of a given input parameter, a plurality of the first values are determined to use when calculating a corresponding plurality of second values for each of one or more output parameters. By using at least the determined plurality of first values for the given input parameter and selected values for other input parameters in the plurality of input parameters, the corresponding plurality of second values are calculated for each of the one or more output parameters. The one or more output parameters correspond to the one or more given interconnects. Each of the second values corresponds to one of the determined plurality of first values.