Frederick W Leung

US Patent:

20130127430, May 23, 2013

Filed:

Nov 5, 2012

Appl. No.:

13/668933

Inventors:

Frederick KwokYin Leung - Cupertino CA, US

Assignee:

Diodes Incorporated - Plano TX

International Classification:

G05F 1/10
H03K 5/24

US Classification:

323282, 327 77

Abstract:

A voltage regulator that modulates the switching of a switching circuit to regulate the output voltage level supplied to a system. The regulator uses a comparator circuit to compare a reference signal to an analog signal derived from the output voltage of the regulator, and outputs a binary signal based on the comparison. The regulator may use a counter circuit that interrogates the binary signal from the comparator circuit and generates a counter signal proportional to, for example, the duration of the binary signal when it stays in one of the two binary states. The regulator then uses a trigger circuit that generates a signal based on the counter signal to effectuate the modulation of the switching of the switching circuit. The reference signal may be modified by a hysteresis level adjuster to force a triggering event at the switching circuit.

US Patent:

51967391, Mar 23, 1993

Filed:

Apr 3, 1991

Appl. No.:

7/679702

Inventors:

Bal S. Sandhu - Fremont CA
Frederick K. Leung - Cupertino CA

Assignee:

National Semiconductor Corporation - Santa Clara CA

International Classification:

H03K 1710

US Classification:

3072961

Abstract:

A charge pump circuit for use in Electrically Erasable Programmed Read-Only Memories in described herein. The charge pump uses a single clock signal, a voltage feedback arrangement to allow a D. C. voltage to pass a D. C. voltage, and a plurality of transistors, each transistor being coupled in series with each grounded-gate transistor, eliminating reverse-breakdown voltage loads on the grounded gate transistors.

US Patent:

55487823, Aug 20, 1996

Filed:

May 7, 1993

Appl. No.:

8/058397

Inventors:

Martin S. Michael - Los Gatos CA
Frederick K. Leung - Cupertino CA

Assignee:

National Semiconductor Corporation - Santa Clara CA

International Classification:

G06F 1502

US Classification:

395835

Abstract:

A computer system includes a peripheral device connector interface that automatically identifies the type of peripheral device, if any, coupled to the interface and configures itself for handling data flows to and from peripheral devices of the identified type. The system includes a connector that receives a number of peripheral identification signals that are generated by a peripheral device attached to the connector. Peripheral device data signals, which are also received at the connector, are routed by a connector interface. A number of interface circuits are provided to control the different types of peripheral devices that may be attached to the connector. The interface circuits are coupled to configuration registers that provide operational information for the interface circuits. A transition detector identifies any change in the peripheral identification signals. Any change in the peripheral identification signals corresponds to a change in the peripheral device attached to the connector.

US Patent:

51381893, Aug 11, 1992

Filed:

Sep 27, 1990

Appl. No.:

7/588696

Inventors:

Frederick Kwok-Yin Leung - Cupertino CA
Richard D. Henderson - Sunnyvale CA

Assignee:

National Semiconductor - Santa Clara CA

International Classification:

H03K 1718
H03K 327

US Classification:

3072721

Abstract:

A circuit for sampling a digital input signal utilizing an asynchronous strobe signal and a method for such synchronization are disclosed. The circuit includes an input storage element, such as a latch, which stores the input signal upon receipt of a strobe signal. There is a possibility that the input storage element will become temporarily metastable, with the output of the element being indeterminate, should the digital input signal change levels at substantially the time that the strobe signal is received. The subject synchronization circuit includes circuitry which senses when the input storage element is metastable and gating circuitry which produces a synchronized signal after receipt of the strobe signal, provided the input storage element is not metastable. The synchronized signal can then be used to clock the stored input signal.

US Patent:

20150188428, Jul 2, 2015

Filed:

Dec 23, 2014

Appl. No.:

14/581058

Inventors:

- Plano TX, US
Frederick Leung - Cupertino CA, US

International Classification:

H02M 3/158

Abstract:

A novel switching power converter comprises a state machine. The state machine continuously seeks an optimal switching timing of a switch in the converter for maximum system efficiency. The state machine moves the triggering edge of a switching signal that triggers a second switch in a controlled step and direction with respect to a prior signal, and measures the on-time during which power goes into the converter. The measured on-time is then compared to a reference to determine the correctness of the movement. The movement of the triggering edge continues to maintain maximum conversion efficiency.